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![Thomas Gleixner](/assets/img/avatar_default.png)
Use the common msi_index member and get rid of the pointless wrapper struct. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Nishanth Menon <nm@ti.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Acked-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20211210221814.540704224@linutronix.de
746 lines
22 KiB
C
746 lines
22 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Texas Instruments' K3 Interrupt Aggregator irqchip driver
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*
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* Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
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* Lokesh Vutla <lokeshvutla@ti.com>
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*/
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/irqdomain.h>
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#include <linux/interrupt.h>
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#include <linux/msi.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/soc/ti/ti_sci_inta_msi.h>
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#include <linux/soc/ti/ti_sci_protocol.h>
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#include <asm-generic/msi.h>
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#define TI_SCI_DEV_ID_MASK 0xffff
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#define TI_SCI_DEV_ID_SHIFT 16
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#define TI_SCI_IRQ_ID_MASK 0xffff
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#define TI_SCI_IRQ_ID_SHIFT 0
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#define HWIRQ_TO_DEVID(hwirq) (((hwirq) >> (TI_SCI_DEV_ID_SHIFT)) & \
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(TI_SCI_DEV_ID_MASK))
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#define HWIRQ_TO_IRQID(hwirq) ((hwirq) & (TI_SCI_IRQ_ID_MASK))
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#define TO_HWIRQ(dev, index) ((((dev) & TI_SCI_DEV_ID_MASK) << \
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TI_SCI_DEV_ID_SHIFT) | \
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((index) & TI_SCI_IRQ_ID_MASK))
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#define MAX_EVENTS_PER_VINT 64
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#define VINT_ENABLE_SET_OFFSET 0x0
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#define VINT_ENABLE_CLR_OFFSET 0x8
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#define VINT_STATUS_OFFSET 0x18
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#define VINT_STATUS_MASKED_OFFSET 0x20
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/**
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* struct ti_sci_inta_event_desc - Description of an event coming to
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* Interrupt Aggregator. This serves
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* as a mapping table for global event,
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* hwirq and vint bit.
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* @global_event: Global event number corresponding to this event
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* @hwirq: Hwirq of the incoming interrupt
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* @vint_bit: Corresponding vint bit to which this event is attached.
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*/
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struct ti_sci_inta_event_desc {
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u16 global_event;
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u32 hwirq;
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u8 vint_bit;
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};
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/**
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* struct ti_sci_inta_vint_desc - Description of a virtual interrupt coming out
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* of Interrupt Aggregator.
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* @domain: Pointer to IRQ domain to which this vint belongs.
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* @list: List entry for the vint list
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* @event_map: Bitmap to manage the allocation of events to vint.
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* @events: Array of event descriptors assigned to this vint.
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* @parent_virq: Linux IRQ number that gets attached to parent
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* @vint_id: TISCI vint ID
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*/
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struct ti_sci_inta_vint_desc {
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struct irq_domain *domain;
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struct list_head list;
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DECLARE_BITMAP(event_map, MAX_EVENTS_PER_VINT);
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struct ti_sci_inta_event_desc events[MAX_EVENTS_PER_VINT];
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unsigned int parent_virq;
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u16 vint_id;
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};
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/**
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* struct ti_sci_inta_irq_domain - Structure representing a TISCI based
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* Interrupt Aggregator IRQ domain.
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* @sci: Pointer to TISCI handle
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* @vint: TISCI resource pointer representing IA interrupts.
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* @global_event: TISCI resource pointer representing global events.
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* @vint_list: List of the vints active in the system
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* @vint_mutex: Mutex to protect vint_list
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* @base: Base address of the memory mapped IO registers
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* @pdev: Pointer to platform device.
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* @ti_sci_id: TI-SCI device identifier
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* @unmapped_cnt: Number of @unmapped_dev_ids entries
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* @unmapped_dev_ids: Pointer to an array of TI-SCI device identifiers of
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* unmapped event sources.
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* Unmapped Events are not part of the Global Event Map and
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* they are converted to Global event within INTA to be
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* received by the same INTA to generate an interrupt.
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* In case an interrupt request comes for a device which is
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* generating Unmapped Event, we must use the INTA's TI-SCI
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* device identifier in place of the source device
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* identifier to let sysfw know where it has to program the
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* Global Event number.
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*/
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struct ti_sci_inta_irq_domain {
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const struct ti_sci_handle *sci;
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struct ti_sci_resource *vint;
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struct ti_sci_resource *global_event;
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struct list_head vint_list;
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/* Mutex to protect vint list */
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struct mutex vint_mutex;
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void __iomem *base;
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struct platform_device *pdev;
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u32 ti_sci_id;
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int unmapped_cnt;
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u16 *unmapped_dev_ids;
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};
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#define to_vint_desc(e, i) container_of(e, struct ti_sci_inta_vint_desc, \
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events[i])
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static u16 ti_sci_inta_get_dev_id(struct ti_sci_inta_irq_domain *inta, u32 hwirq)
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{
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u16 dev_id = HWIRQ_TO_DEVID(hwirq);
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int i;
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if (inta->unmapped_cnt == 0)
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return dev_id;
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/*
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* For devices sending Unmapped Events we must use the INTA's TI-SCI
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* device identifier number to be able to convert it to a Global Event
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* and map it to an interrupt.
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*/
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for (i = 0; i < inta->unmapped_cnt; i++) {
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if (dev_id == inta->unmapped_dev_ids[i]) {
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dev_id = inta->ti_sci_id;
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break;
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}
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}
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return dev_id;
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}
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/**
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* ti_sci_inta_irq_handler() - Chained IRQ handler for the vint irqs
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* @desc: Pointer to irq_desc corresponding to the irq
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*/
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static void ti_sci_inta_irq_handler(struct irq_desc *desc)
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{
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struct ti_sci_inta_vint_desc *vint_desc;
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struct ti_sci_inta_irq_domain *inta;
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struct irq_domain *domain;
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unsigned int bit;
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unsigned long val;
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vint_desc = irq_desc_get_handler_data(desc);
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domain = vint_desc->domain;
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inta = domain->host_data;
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chained_irq_enter(irq_desc_get_chip(desc), desc);
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val = readq_relaxed(inta->base + vint_desc->vint_id * 0x1000 +
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VINT_STATUS_MASKED_OFFSET);
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for_each_set_bit(bit, &val, MAX_EVENTS_PER_VINT)
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generic_handle_domain_irq(domain, vint_desc->events[bit].hwirq);
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chained_irq_exit(irq_desc_get_chip(desc), desc);
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}
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/**
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* ti_sci_inta_xlate_irq() - Translate hwirq to parent's hwirq.
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* @inta: IRQ domain corresponding to Interrupt Aggregator
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* @irq: Hardware irq corresponding to the above irq domain
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*
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* Return parent irq number if translation is available else -ENOENT.
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*/
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static int ti_sci_inta_xlate_irq(struct ti_sci_inta_irq_domain *inta,
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u16 vint_id)
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{
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struct device_node *np = dev_of_node(&inta->pdev->dev);
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u32 base, parent_base, size;
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const __be32 *range;
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int len;
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range = of_get_property(np, "ti,interrupt-ranges", &len);
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if (!range)
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return vint_id;
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for (len /= sizeof(*range); len >= 3; len -= 3) {
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base = be32_to_cpu(*range++);
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parent_base = be32_to_cpu(*range++);
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size = be32_to_cpu(*range++);
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if (base <= vint_id && vint_id < base + size)
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return vint_id - base + parent_base;
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}
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return -ENOENT;
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}
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/**
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* ti_sci_inta_alloc_parent_irq() - Allocate parent irq to Interrupt aggregator
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* @domain: IRQ domain corresponding to Interrupt Aggregator
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*
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* Return 0 if all went well else corresponding error value.
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*/
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static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_domain *domain)
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{
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struct ti_sci_inta_irq_domain *inta = domain->host_data;
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struct ti_sci_inta_vint_desc *vint_desc;
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struct irq_fwspec parent_fwspec;
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struct device_node *parent_node;
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unsigned int parent_virq;
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int p_hwirq, ret;
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u16 vint_id;
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vint_id = ti_sci_get_free_resource(inta->vint);
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if (vint_id == TI_SCI_RESOURCE_NULL)
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return ERR_PTR(-EINVAL);
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p_hwirq = ti_sci_inta_xlate_irq(inta, vint_id);
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if (p_hwirq < 0) {
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ret = p_hwirq;
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goto free_vint;
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}
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vint_desc = kzalloc(sizeof(*vint_desc), GFP_KERNEL);
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if (!vint_desc) {
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ret = -ENOMEM;
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goto free_vint;
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}
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vint_desc->domain = domain;
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vint_desc->vint_id = vint_id;
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INIT_LIST_HEAD(&vint_desc->list);
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parent_node = of_irq_find_parent(dev_of_node(&inta->pdev->dev));
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parent_fwspec.fwnode = of_node_to_fwnode(parent_node);
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if (of_device_is_compatible(parent_node, "arm,gic-v3")) {
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/* Parent is GIC */
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parent_fwspec.param_count = 3;
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parent_fwspec.param[0] = 0;
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parent_fwspec.param[1] = p_hwirq - 32;
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parent_fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH;
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} else {
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/* Parent is Interrupt Router */
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parent_fwspec.param_count = 1;
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parent_fwspec.param[0] = p_hwirq;
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}
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parent_virq = irq_create_fwspec_mapping(&parent_fwspec);
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if (parent_virq == 0) {
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dev_err(&inta->pdev->dev, "Parent IRQ allocation failed\n");
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ret = -EINVAL;
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goto free_vint_desc;
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}
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vint_desc->parent_virq = parent_virq;
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list_add_tail(&vint_desc->list, &inta->vint_list);
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irq_set_chained_handler_and_data(vint_desc->parent_virq,
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ti_sci_inta_irq_handler, vint_desc);
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return vint_desc;
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free_vint_desc:
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kfree(vint_desc);
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free_vint:
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ti_sci_release_resource(inta->vint, vint_id);
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return ERR_PTR(ret);
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}
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/**
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* ti_sci_inta_alloc_event() - Attach an event to a IA vint.
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* @vint_desc: Pointer to vint_desc to which the event gets attached
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* @free_bit: Bit inside vint to which event gets attached
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* @hwirq: hwirq of the input event
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*
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* Return event_desc pointer if all went ok else appropriate error value.
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*/
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static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_event(struct ti_sci_inta_vint_desc *vint_desc,
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u16 free_bit,
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u32 hwirq)
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{
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struct ti_sci_inta_irq_domain *inta = vint_desc->domain->host_data;
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struct ti_sci_inta_event_desc *event_desc;
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u16 dev_id, dev_index;
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int err;
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dev_id = ti_sci_inta_get_dev_id(inta, hwirq);
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dev_index = HWIRQ_TO_IRQID(hwirq);
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event_desc = &vint_desc->events[free_bit];
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event_desc->hwirq = hwirq;
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event_desc->vint_bit = free_bit;
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event_desc->global_event = ti_sci_get_free_resource(inta->global_event);
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if (event_desc->global_event == TI_SCI_RESOURCE_NULL)
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return ERR_PTR(-EINVAL);
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err = inta->sci->ops.rm_irq_ops.set_event_map(inta->sci,
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dev_id, dev_index,
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inta->ti_sci_id,
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vint_desc->vint_id,
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event_desc->global_event,
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free_bit);
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if (err)
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goto free_global_event;
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return event_desc;
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free_global_event:
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ti_sci_release_resource(inta->global_event, event_desc->global_event);
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return ERR_PTR(err);
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}
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/**
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* ti_sci_inta_alloc_irq() - Allocate an irq within INTA domain
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* @domain: irq_domain pointer corresponding to INTA
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* @hwirq: hwirq of the input event
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*
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* Note: Allocation happens in the following manner:
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* - Find a free bit available in any of the vints available in the list.
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* - If not found, allocate a vint from the vint pool
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* - Attach the free bit to input hwirq.
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* Return event_desc if all went ok else appropriate error value.
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*/
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static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_irq(struct irq_domain *domain,
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u32 hwirq)
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{
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struct ti_sci_inta_irq_domain *inta = domain->host_data;
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struct ti_sci_inta_vint_desc *vint_desc = NULL;
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struct ti_sci_inta_event_desc *event_desc;
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u16 free_bit;
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mutex_lock(&inta->vint_mutex);
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list_for_each_entry(vint_desc, &inta->vint_list, list) {
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free_bit = find_first_zero_bit(vint_desc->event_map,
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MAX_EVENTS_PER_VINT);
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if (free_bit != MAX_EVENTS_PER_VINT) {
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set_bit(free_bit, vint_desc->event_map);
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goto alloc_event;
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}
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}
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/* No free bits available. Allocate a new vint */
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vint_desc = ti_sci_inta_alloc_parent_irq(domain);
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if (IS_ERR(vint_desc)) {
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event_desc = ERR_CAST(vint_desc);
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goto unlock;
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}
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free_bit = find_first_zero_bit(vint_desc->event_map,
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MAX_EVENTS_PER_VINT);
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set_bit(free_bit, vint_desc->event_map);
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alloc_event:
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event_desc = ti_sci_inta_alloc_event(vint_desc, free_bit, hwirq);
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if (IS_ERR(event_desc))
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clear_bit(free_bit, vint_desc->event_map);
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unlock:
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mutex_unlock(&inta->vint_mutex);
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return event_desc;
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}
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/**
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* ti_sci_inta_free_parent_irq() - Free a parent irq to INTA
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* @inta: Pointer to inta domain.
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* @vint_desc: Pointer to vint_desc that needs to be freed.
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*/
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static void ti_sci_inta_free_parent_irq(struct ti_sci_inta_irq_domain *inta,
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struct ti_sci_inta_vint_desc *vint_desc)
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{
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if (find_first_bit(vint_desc->event_map, MAX_EVENTS_PER_VINT) == MAX_EVENTS_PER_VINT) {
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list_del(&vint_desc->list);
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ti_sci_release_resource(inta->vint, vint_desc->vint_id);
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irq_dispose_mapping(vint_desc->parent_virq);
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kfree(vint_desc);
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}
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}
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/**
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* ti_sci_inta_free_irq() - Free an IRQ within INTA domain
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* @event_desc: Pointer to event_desc that needs to be freed.
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* @hwirq: Hwirq number within INTA domain that needs to be freed
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*/
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static void ti_sci_inta_free_irq(struct ti_sci_inta_event_desc *event_desc,
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u32 hwirq)
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{
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struct ti_sci_inta_vint_desc *vint_desc;
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struct ti_sci_inta_irq_domain *inta;
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u16 dev_id;
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vint_desc = to_vint_desc(event_desc, event_desc->vint_bit);
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inta = vint_desc->domain->host_data;
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dev_id = ti_sci_inta_get_dev_id(inta, hwirq);
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/* free event irq */
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mutex_lock(&inta->vint_mutex);
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inta->sci->ops.rm_irq_ops.free_event_map(inta->sci,
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dev_id, HWIRQ_TO_IRQID(hwirq),
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inta->ti_sci_id,
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vint_desc->vint_id,
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event_desc->global_event,
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event_desc->vint_bit);
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|
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clear_bit(event_desc->vint_bit, vint_desc->event_map);
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ti_sci_release_resource(inta->global_event, event_desc->global_event);
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event_desc->global_event = TI_SCI_RESOURCE_NULL;
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event_desc->hwirq = 0;
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|
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ti_sci_inta_free_parent_irq(inta, vint_desc);
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mutex_unlock(&inta->vint_mutex);
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}
|
|
|
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/**
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* ti_sci_inta_request_resources() - Allocate resources for input irq
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* @data: Pointer to corresponding irq_data
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*
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* Note: This is the core api where the actual allocation happens for input
|
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* hwirq. This allocation involves creating a parent irq for vint.
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* If this is done in irq_domain_ops.alloc() then a deadlock is reached
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* for allocation. So this allocation is being done in request_resources()
|
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*
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* Return: 0 if all went well else corresponding error.
|
|
*/
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static int ti_sci_inta_request_resources(struct irq_data *data)
|
|
{
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struct ti_sci_inta_event_desc *event_desc;
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|
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event_desc = ti_sci_inta_alloc_irq(data->domain, data->hwirq);
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if (IS_ERR(event_desc))
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return PTR_ERR(event_desc);
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data->chip_data = event_desc;
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|
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return 0;
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}
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|
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/**
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* ti_sci_inta_release_resources - Release resources for input irq
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* @data: Pointer to corresponding irq_data
|
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*
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* Note: Corresponding to request_resources(), all the unmapping and deletion
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* of parent vint irqs happens in this api.
|
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*/
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static void ti_sci_inta_release_resources(struct irq_data *data)
|
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{
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struct ti_sci_inta_event_desc *event_desc;
|
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|
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event_desc = irq_data_get_irq_chip_data(data);
|
|
ti_sci_inta_free_irq(event_desc, data->hwirq);
|
|
}
|
|
|
|
/**
|
|
* ti_sci_inta_manage_event() - Control the event based on the offset
|
|
* @data: Pointer to corresponding irq_data
|
|
* @offset: register offset using which event is controlled.
|
|
*/
|
|
static void ti_sci_inta_manage_event(struct irq_data *data, u32 offset)
|
|
{
|
|
struct ti_sci_inta_event_desc *event_desc;
|
|
struct ti_sci_inta_vint_desc *vint_desc;
|
|
struct ti_sci_inta_irq_domain *inta;
|
|
|
|
event_desc = irq_data_get_irq_chip_data(data);
|
|
vint_desc = to_vint_desc(event_desc, event_desc->vint_bit);
|
|
inta = data->domain->host_data;
|
|
|
|
writeq_relaxed(BIT(event_desc->vint_bit),
|
|
inta->base + vint_desc->vint_id * 0x1000 + offset);
|
|
}
|
|
|
|
/**
|
|
* ti_sci_inta_mask_irq() - Mask an event
|
|
* @data: Pointer to corresponding irq_data
|
|
*/
|
|
static void ti_sci_inta_mask_irq(struct irq_data *data)
|
|
{
|
|
ti_sci_inta_manage_event(data, VINT_ENABLE_CLR_OFFSET);
|
|
}
|
|
|
|
/**
|
|
* ti_sci_inta_unmask_irq() - Unmask an event
|
|
* @data: Pointer to corresponding irq_data
|
|
*/
|
|
static void ti_sci_inta_unmask_irq(struct irq_data *data)
|
|
{
|
|
ti_sci_inta_manage_event(data, VINT_ENABLE_SET_OFFSET);
|
|
}
|
|
|
|
/**
|
|
* ti_sci_inta_ack_irq() - Ack an event
|
|
* @data: Pointer to corresponding irq_data
|
|
*/
|
|
static void ti_sci_inta_ack_irq(struct irq_data *data)
|
|
{
|
|
/*
|
|
* Do not clear the event if hardware is capable of sending
|
|
* a down event.
|
|
*/
|
|
if (irqd_get_trigger_type(data) != IRQF_TRIGGER_HIGH)
|
|
ti_sci_inta_manage_event(data, VINT_STATUS_OFFSET);
|
|
}
|
|
|
|
static int ti_sci_inta_set_affinity(struct irq_data *d,
|
|
const struct cpumask *mask_val, bool force)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
/**
|
|
* ti_sci_inta_set_type() - Update the trigger type of the irq.
|
|
* @data: Pointer to corresponding irq_data
|
|
* @type: Trigger type as specified by user
|
|
*
|
|
* Note: This updates the handle_irq callback for level msi.
|
|
*
|
|
* Return 0 if all went well else appropriate error.
|
|
*/
|
|
static int ti_sci_inta_set_type(struct irq_data *data, unsigned int type)
|
|
{
|
|
/*
|
|
* .alloc default sets handle_edge_irq. But if the user specifies
|
|
* that IRQ is level MSI, then update the handle to handle_level_irq
|
|
*/
|
|
switch (type & IRQ_TYPE_SENSE_MASK) {
|
|
case IRQF_TRIGGER_HIGH:
|
|
irq_set_handler_locked(data, handle_level_irq);
|
|
return 0;
|
|
case IRQF_TRIGGER_RISING:
|
|
return 0;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
static struct irq_chip ti_sci_inta_irq_chip = {
|
|
.name = "INTA",
|
|
.irq_ack = ti_sci_inta_ack_irq,
|
|
.irq_mask = ti_sci_inta_mask_irq,
|
|
.irq_set_type = ti_sci_inta_set_type,
|
|
.irq_unmask = ti_sci_inta_unmask_irq,
|
|
.irq_set_affinity = ti_sci_inta_set_affinity,
|
|
.irq_request_resources = ti_sci_inta_request_resources,
|
|
.irq_release_resources = ti_sci_inta_release_resources,
|
|
};
|
|
|
|
/**
|
|
* ti_sci_inta_irq_domain_free() - Free an IRQ from the IRQ domain
|
|
* @domain: Domain to which the irqs belong
|
|
* @virq: base linux virtual IRQ to be freed.
|
|
* @nr_irqs: Number of continuous irqs to be freed
|
|
*/
|
|
static void ti_sci_inta_irq_domain_free(struct irq_domain *domain,
|
|
unsigned int virq, unsigned int nr_irqs)
|
|
{
|
|
struct irq_data *data = irq_domain_get_irq_data(domain, virq);
|
|
|
|
irq_domain_reset_irq_data(data);
|
|
}
|
|
|
|
/**
|
|
* ti_sci_inta_irq_domain_alloc() - Allocate Interrupt aggregator IRQs
|
|
* @domain: Point to the interrupt aggregator IRQ domain
|
|
* @virq: Corresponding Linux virtual IRQ number
|
|
* @nr_irqs: Continuous irqs to be allocated
|
|
* @data: Pointer to firmware specifier
|
|
*
|
|
* No actual allocation happens here.
|
|
*
|
|
* Return 0 if all went well else appropriate error value.
|
|
*/
|
|
static int ti_sci_inta_irq_domain_alloc(struct irq_domain *domain,
|
|
unsigned int virq, unsigned int nr_irqs,
|
|
void *data)
|
|
{
|
|
msi_alloc_info_t *arg = data;
|
|
|
|
irq_domain_set_info(domain, virq, arg->hwirq, &ti_sci_inta_irq_chip,
|
|
NULL, handle_edge_irq, NULL, NULL);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct irq_domain_ops ti_sci_inta_irq_domain_ops = {
|
|
.free = ti_sci_inta_irq_domain_free,
|
|
.alloc = ti_sci_inta_irq_domain_alloc,
|
|
};
|
|
|
|
static struct irq_chip ti_sci_inta_msi_irq_chip = {
|
|
.name = "MSI-INTA",
|
|
.flags = IRQCHIP_SUPPORTS_LEVEL_MSI,
|
|
};
|
|
|
|
static void ti_sci_inta_msi_set_desc(msi_alloc_info_t *arg,
|
|
struct msi_desc *desc)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(desc->dev);
|
|
|
|
arg->desc = desc;
|
|
arg->hwirq = TO_HWIRQ(pdev->id, desc->msi_index);
|
|
}
|
|
|
|
static struct msi_domain_ops ti_sci_inta_msi_ops = {
|
|
.set_desc = ti_sci_inta_msi_set_desc,
|
|
};
|
|
|
|
static struct msi_domain_info ti_sci_inta_msi_domain_info = {
|
|
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
|
|
MSI_FLAG_LEVEL_CAPABLE),
|
|
.ops = &ti_sci_inta_msi_ops,
|
|
.chip = &ti_sci_inta_msi_irq_chip,
|
|
};
|
|
|
|
static int ti_sci_inta_get_unmapped_sources(struct ti_sci_inta_irq_domain *inta)
|
|
{
|
|
struct device *dev = &inta->pdev->dev;
|
|
struct device_node *node = dev_of_node(dev);
|
|
struct of_phandle_iterator it;
|
|
int count, err, ret, i;
|
|
|
|
count = of_count_phandle_with_args(node, "ti,unmapped-event-sources", NULL);
|
|
if (count <= 0)
|
|
return 0;
|
|
|
|
inta->unmapped_dev_ids = devm_kcalloc(dev, count,
|
|
sizeof(*inta->unmapped_dev_ids),
|
|
GFP_KERNEL);
|
|
if (!inta->unmapped_dev_ids)
|
|
return -ENOMEM;
|
|
|
|
i = 0;
|
|
of_for_each_phandle(&it, err, node, "ti,unmapped-event-sources", NULL, 0) {
|
|
u32 dev_id;
|
|
|
|
ret = of_property_read_u32(it.node, "ti,sci-dev-id", &dev_id);
|
|
if (ret) {
|
|
dev_err(dev, "ti,sci-dev-id read failure for %pOFf\n", it.node);
|
|
of_node_put(it.node);
|
|
return ret;
|
|
}
|
|
inta->unmapped_dev_ids[i++] = dev_id;
|
|
}
|
|
|
|
inta->unmapped_cnt = count;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev)
|
|
{
|
|
struct irq_domain *parent_domain, *domain, *msi_domain;
|
|
struct device_node *parent_node, *node;
|
|
struct ti_sci_inta_irq_domain *inta;
|
|
struct device *dev = &pdev->dev;
|
|
int ret;
|
|
|
|
node = dev_of_node(dev);
|
|
parent_node = of_irq_find_parent(node);
|
|
if (!parent_node) {
|
|
dev_err(dev, "Failed to get IRQ parent node\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
parent_domain = irq_find_host(parent_node);
|
|
if (!parent_domain)
|
|
return -EPROBE_DEFER;
|
|
|
|
inta = devm_kzalloc(dev, sizeof(*inta), GFP_KERNEL);
|
|
if (!inta)
|
|
return -ENOMEM;
|
|
|
|
inta->pdev = pdev;
|
|
inta->sci = devm_ti_sci_get_by_phandle(dev, "ti,sci");
|
|
if (IS_ERR(inta->sci))
|
|
return dev_err_probe(dev, PTR_ERR(inta->sci),
|
|
"ti,sci read fail\n");
|
|
|
|
ret = of_property_read_u32(dev->of_node, "ti,sci-dev-id", &inta->ti_sci_id);
|
|
if (ret) {
|
|
dev_err(dev, "missing 'ti,sci-dev-id' property\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
inta->vint = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
|
|
TI_SCI_RESASG_SUBTYPE_IA_VINT);
|
|
if (IS_ERR(inta->vint)) {
|
|
dev_err(dev, "VINT resource allocation failed\n");
|
|
return PTR_ERR(inta->vint);
|
|
}
|
|
|
|
inta->global_event = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
|
|
TI_SCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT);
|
|
if (IS_ERR(inta->global_event)) {
|
|
dev_err(dev, "Global event resource allocation failed\n");
|
|
return PTR_ERR(inta->global_event);
|
|
}
|
|
|
|
inta->base = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(inta->base))
|
|
return PTR_ERR(inta->base);
|
|
|
|
ret = ti_sci_inta_get_unmapped_sources(inta);
|
|
if (ret)
|
|
return ret;
|
|
|
|
domain = irq_domain_add_linear(dev_of_node(dev),
|
|
ti_sci_get_num_resources(inta->vint),
|
|
&ti_sci_inta_irq_domain_ops, inta);
|
|
if (!domain) {
|
|
dev_err(dev, "Failed to allocate IRQ domain\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
msi_domain = ti_sci_inta_msi_create_irq_domain(of_node_to_fwnode(node),
|
|
&ti_sci_inta_msi_domain_info,
|
|
domain);
|
|
if (!msi_domain) {
|
|
irq_domain_remove(domain);
|
|
dev_err(dev, "Failed to allocate msi domain\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
INIT_LIST_HEAD(&inta->vint_list);
|
|
mutex_init(&inta->vint_mutex);
|
|
|
|
dev_info(dev, "Interrupt Aggregator domain %d created\n", inta->ti_sci_id);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id ti_sci_inta_irq_domain_of_match[] = {
|
|
{ .compatible = "ti,sci-inta", },
|
|
{ /* sentinel */ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ti_sci_inta_irq_domain_of_match);
|
|
|
|
static struct platform_driver ti_sci_inta_irq_domain_driver = {
|
|
.probe = ti_sci_inta_irq_domain_probe,
|
|
.driver = {
|
|
.name = "ti-sci-inta",
|
|
.of_match_table = ti_sci_inta_irq_domain_of_match,
|
|
},
|
|
};
|
|
module_platform_driver(ti_sci_inta_irq_domain_driver);
|
|
|
|
MODULE_AUTHOR("Lokesh Vutla <lokeshvutla@ti.com>");
|
|
MODULE_DESCRIPTION("K3 Interrupt Aggregator driver over TI SCI protocol");
|
|
MODULE_LICENSE("GPL v2");
|