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![Alexandre Belloni](/assets/img/avatar_default.png)
When CONFIG_OF is disabled then the matching table is not referenced. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20210202112219.3610853-22-alexandre.belloni@bootlin.com
229 lines
5.8 KiB
C
229 lines
5.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Real Time Clock (RTC) Driver for sd3078
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* Copyright (C) 2018 Zoro Li
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*/
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#include <linux/bcd.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/rtc.h>
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#include <linux/slab.h>
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#define SD3078_REG_SC 0x00
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#define SD3078_REG_MN 0x01
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#define SD3078_REG_HR 0x02
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#define SD3078_REG_DW 0x03
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#define SD3078_REG_DM 0x04
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#define SD3078_REG_MO 0x05
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#define SD3078_REG_YR 0x06
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#define SD3078_REG_CTRL1 0x0f
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#define SD3078_REG_CTRL2 0x10
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#define SD3078_REG_CTRL3 0x11
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#define KEY_WRITE1 0x80
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#define KEY_WRITE2 0x04
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#define KEY_WRITE3 0x80
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#define NUM_TIME_REGS (SD3078_REG_YR - SD3078_REG_SC + 1)
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/*
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* The sd3078 has write protection
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* and we can choose whether or not to use it.
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* Write protection is turned off by default.
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*/
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#define WRITE_PROTECT_EN 0
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struct sd3078 {
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struct rtc_device *rtc;
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struct regmap *regmap;
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};
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/*
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* In order to prevent arbitrary modification of the time register,
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* when modification of the register,
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* the "write" bit needs to be written in a certain order.
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* 1. set WRITE1 bit
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* 2. set WRITE2 bit
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* 3. set WRITE3 bit
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*/
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static void sd3078_enable_reg_write(struct sd3078 *sd3078)
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{
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regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL2,
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KEY_WRITE1, KEY_WRITE1);
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regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL1,
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KEY_WRITE2, KEY_WRITE2);
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regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL1,
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KEY_WRITE3, KEY_WRITE3);
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}
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#if WRITE_PROTECT_EN
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/*
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* In order to prevent arbitrary modification of the time register,
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* we should disable the write function.
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* when disable write,
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* the "write" bit needs to be clear in a certain order.
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* 1. clear WRITE2 bit
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* 2. clear WRITE3 bit
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* 3. clear WRITE1 bit
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*/
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static void sd3078_disable_reg_write(struct sd3078 *sd3078)
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{
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regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL1,
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KEY_WRITE2, 0);
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regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL1,
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KEY_WRITE3, 0);
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regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL2,
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KEY_WRITE1, 0);
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}
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#endif
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static int sd3078_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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unsigned char hour;
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unsigned char rtc_data[NUM_TIME_REGS] = {0};
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struct i2c_client *client = to_i2c_client(dev);
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struct sd3078 *sd3078 = i2c_get_clientdata(client);
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int ret;
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ret = regmap_bulk_read(sd3078->regmap, SD3078_REG_SC, rtc_data,
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NUM_TIME_REGS);
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if (ret < 0) {
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dev_err(dev, "reading from RTC failed with err:%d\n", ret);
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return ret;
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}
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tm->tm_sec = bcd2bin(rtc_data[SD3078_REG_SC] & 0x7F);
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tm->tm_min = bcd2bin(rtc_data[SD3078_REG_MN] & 0x7F);
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/*
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* The sd3078 supports 12/24 hour mode.
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* When getting time,
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* we need to convert the 12 hour mode to the 24 hour mode.
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*/
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hour = rtc_data[SD3078_REG_HR];
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if (hour & 0x80) /* 24H MODE */
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tm->tm_hour = bcd2bin(rtc_data[SD3078_REG_HR] & 0x3F);
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else if (hour & 0x20) /* 12H MODE PM */
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tm->tm_hour = bcd2bin(rtc_data[SD3078_REG_HR] & 0x1F) + 12;
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else /* 12H MODE AM */
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tm->tm_hour = bcd2bin(rtc_data[SD3078_REG_HR] & 0x1F);
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tm->tm_mday = bcd2bin(rtc_data[SD3078_REG_DM] & 0x3F);
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tm->tm_wday = rtc_data[SD3078_REG_DW] & 0x07;
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tm->tm_mon = bcd2bin(rtc_data[SD3078_REG_MO] & 0x1F) - 1;
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tm->tm_year = bcd2bin(rtc_data[SD3078_REG_YR]) + 100;
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return 0;
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}
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static int sd3078_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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unsigned char rtc_data[NUM_TIME_REGS];
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struct i2c_client *client = to_i2c_client(dev);
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struct sd3078 *sd3078 = i2c_get_clientdata(client);
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int ret;
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rtc_data[SD3078_REG_SC] = bin2bcd(tm->tm_sec);
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rtc_data[SD3078_REG_MN] = bin2bcd(tm->tm_min);
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rtc_data[SD3078_REG_HR] = bin2bcd(tm->tm_hour) | 0x80;
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rtc_data[SD3078_REG_DM] = bin2bcd(tm->tm_mday);
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rtc_data[SD3078_REG_DW] = tm->tm_wday & 0x07;
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rtc_data[SD3078_REG_MO] = bin2bcd(tm->tm_mon) + 1;
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rtc_data[SD3078_REG_YR] = bin2bcd(tm->tm_year - 100);
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#if WRITE_PROTECT_EN
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sd3078_enable_reg_write(sd3078);
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#endif
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ret = regmap_bulk_write(sd3078->regmap, SD3078_REG_SC, rtc_data,
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NUM_TIME_REGS);
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if (ret < 0) {
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dev_err(dev, "writing to RTC failed with err:%d\n", ret);
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return ret;
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}
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#if WRITE_PROTECT_EN
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sd3078_disable_reg_write(sd3078);
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#endif
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return 0;
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}
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static const struct rtc_class_ops sd3078_rtc_ops = {
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.read_time = sd3078_rtc_read_time,
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.set_time = sd3078_rtc_set_time,
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};
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static const struct regmap_config regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = 0x11,
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};
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static int sd3078_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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int ret;
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struct sd3078 *sd3078;
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if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
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return -ENODEV;
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sd3078 = devm_kzalloc(&client->dev, sizeof(*sd3078), GFP_KERNEL);
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if (!sd3078)
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return -ENOMEM;
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sd3078->regmap = devm_regmap_init_i2c(client, ®map_config);
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if (IS_ERR(sd3078->regmap)) {
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dev_err(&client->dev, "regmap allocation failed\n");
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return PTR_ERR(sd3078->regmap);
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}
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i2c_set_clientdata(client, sd3078);
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sd3078->rtc = devm_rtc_allocate_device(&client->dev);
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if (IS_ERR(sd3078->rtc))
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return PTR_ERR(sd3078->rtc);
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sd3078->rtc->ops = &sd3078_rtc_ops;
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sd3078->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
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sd3078->rtc->range_max = RTC_TIMESTAMP_END_2099;
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ret = devm_rtc_register_device(sd3078->rtc);
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if (ret)
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return ret;
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sd3078_enable_reg_write(sd3078);
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return 0;
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}
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static const struct i2c_device_id sd3078_id[] = {
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{"sd3078", 0},
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, sd3078_id);
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static const __maybe_unused struct of_device_id rtc_dt_match[] = {
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{ .compatible = "whwave,sd3078" },
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{},
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};
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MODULE_DEVICE_TABLE(of, rtc_dt_match);
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static struct i2c_driver sd3078_driver = {
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.driver = {
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.name = "sd3078",
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.of_match_table = of_match_ptr(rtc_dt_match),
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},
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.probe = sd3078_probe,
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.id_table = sd3078_id,
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};
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module_i2c_driver(sd3078_driver);
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MODULE_AUTHOR("Dianlong Li <long17.cool@163.com>");
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MODULE_DESCRIPTION("SD3078 RTC driver");
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MODULE_LICENSE("GPL v2");
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