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![Oliver Hartkopp](/assets/img/avatar_default.png)
CAN interfaces only support MTU values of 16 (CAN 2.0) and 72 (CAN FD). Setting the MTU to other values is pointless but it does not really hurt. With the introduction of the CAN FD support in drivers/net/can a new function to switch the MTU for CAN FD has been introduced. This patch makes use of this can_change_mtu() function to check for correct MTU settings also in legacy CAN (2.0) devices. Signed-off-by: Oliver Hartkopp <socketcan@hartkopp.net> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
692 lines
16 KiB
C
692 lines
16 KiB
C
/*
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* Blackfin On-Chip CAN Driver
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*
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* Copyright 2004-2009 Analog Devices Inc.
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*
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* Enter bugs at http://blackfin.uclinux.org/
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/bitops.h>
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#include <linux/interrupt.h>
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#include <linux/errno.h>
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#include <linux/netdevice.h>
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#include <linux/skbuff.h>
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#include <linux/platform_device.h>
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#include <linux/can/dev.h>
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#include <linux/can/error.h>
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#include <asm/bfin_can.h>
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#include <asm/portmux.h>
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#define DRV_NAME "bfin_can"
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#define BFIN_CAN_TIMEOUT 100
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#define TX_ECHO_SKB_MAX 1
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/*
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* bfin can private data
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*/
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struct bfin_can_priv {
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struct can_priv can; /* must be the first member */
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struct net_device *dev;
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void __iomem *membase;
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int rx_irq;
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int tx_irq;
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int err_irq;
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unsigned short *pin_list;
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};
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/*
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* bfin can timing parameters
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*/
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static const struct can_bittiming_const bfin_can_bittiming_const = {
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.name = DRV_NAME,
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.tseg1_min = 1,
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.tseg1_max = 16,
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.tseg2_min = 1,
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.tseg2_max = 8,
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.sjw_max = 4,
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/*
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* Although the BRP field can be set to any value, it is recommended
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* that the value be greater than or equal to 4, as restrictions
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* apply to the bit timing configuration when BRP is less than 4.
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*/
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.brp_min = 4,
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.brp_max = 1024,
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.brp_inc = 1,
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};
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static int bfin_can_set_bittiming(struct net_device *dev)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct bfin_can_regs __iomem *reg = priv->membase;
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struct can_bittiming *bt = &priv->can.bittiming;
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u16 clk, timing;
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clk = bt->brp - 1;
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timing = ((bt->sjw - 1) << 8) | (bt->prop_seg + bt->phase_seg1 - 1) |
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((bt->phase_seg2 - 1) << 4);
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/*
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* If the SAM bit is set, the input signal is oversampled three times
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* at the SCLK rate.
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*/
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if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
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timing |= SAM;
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bfin_write(®->clock, clk);
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bfin_write(®->timing, timing);
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netdev_info(dev, "setting CLOCK=0x%04x TIMING=0x%04x\n", clk, timing);
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return 0;
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}
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static void bfin_can_set_reset_mode(struct net_device *dev)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct bfin_can_regs __iomem *reg = priv->membase;
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int timeout = BFIN_CAN_TIMEOUT;
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int i;
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/* disable interrupts */
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bfin_write(®->mbim1, 0);
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bfin_write(®->mbim2, 0);
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bfin_write(®->gim, 0);
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/* reset can and enter configuration mode */
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bfin_write(®->control, SRS | CCR);
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SSYNC();
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bfin_write(®->control, CCR);
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SSYNC();
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while (!(bfin_read(®->control) & CCA)) {
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udelay(10);
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if (--timeout == 0) {
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netdev_err(dev, "fail to enter configuration mode\n");
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BUG();
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}
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}
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/*
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* All mailbox configurations are marked as inactive
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* by writing to CAN Mailbox Configuration Registers 1 and 2
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* For all bits: 0 - Mailbox disabled, 1 - Mailbox enabled
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*/
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bfin_write(®->mc1, 0);
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bfin_write(®->mc2, 0);
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/* Set Mailbox Direction */
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bfin_write(®->md1, 0xFFFF); /* mailbox 1-16 are RX */
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bfin_write(®->md2, 0); /* mailbox 17-32 are TX */
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/* RECEIVE_STD_CHL */
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for (i = 0; i < 2; i++) {
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bfin_write(®->chl[RECEIVE_STD_CHL + i].id0, 0);
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bfin_write(®->chl[RECEIVE_STD_CHL + i].id1, AME);
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bfin_write(®->chl[RECEIVE_STD_CHL + i].dlc, 0);
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bfin_write(®->msk[RECEIVE_STD_CHL + i].amh, 0x1FFF);
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bfin_write(®->msk[RECEIVE_STD_CHL + i].aml, 0xFFFF);
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}
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/* RECEIVE_EXT_CHL */
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for (i = 0; i < 2; i++) {
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bfin_write(®->chl[RECEIVE_EXT_CHL + i].id0, 0);
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bfin_write(®->chl[RECEIVE_EXT_CHL + i].id1, AME | IDE);
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bfin_write(®->chl[RECEIVE_EXT_CHL + i].dlc, 0);
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bfin_write(®->msk[RECEIVE_EXT_CHL + i].amh, 0x1FFF);
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bfin_write(®->msk[RECEIVE_EXT_CHL + i].aml, 0xFFFF);
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}
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bfin_write(®->mc2, BIT(TRANSMIT_CHL - 16));
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bfin_write(®->mc1, BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL));
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SSYNC();
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priv->can.state = CAN_STATE_STOPPED;
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}
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static void bfin_can_set_normal_mode(struct net_device *dev)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct bfin_can_regs __iomem *reg = priv->membase;
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int timeout = BFIN_CAN_TIMEOUT;
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/*
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* leave configuration mode
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*/
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bfin_write(®->control, bfin_read(®->control) & ~CCR);
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while (bfin_read(®->status) & CCA) {
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udelay(10);
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if (--timeout == 0) {
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netdev_err(dev, "fail to leave configuration mode\n");
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BUG();
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}
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}
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/*
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* clear _All_ tx and rx interrupts
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*/
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bfin_write(®->mbtif1, 0xFFFF);
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bfin_write(®->mbtif2, 0xFFFF);
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bfin_write(®->mbrif1, 0xFFFF);
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bfin_write(®->mbrif2, 0xFFFF);
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/*
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* clear global interrupt status register
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*/
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bfin_write(®->gis, 0x7FF); /* overwrites with '1' */
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/*
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* Initialize Interrupts
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* - set bits in the mailbox interrupt mask register
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* - global interrupt mask
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*/
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bfin_write(®->mbim1, BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL));
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bfin_write(®->mbim2, BIT(TRANSMIT_CHL - 16));
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bfin_write(®->gim, EPIM | BOIM | RMLIM);
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SSYNC();
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}
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static void bfin_can_start(struct net_device *dev)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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/* enter reset mode */
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if (priv->can.state != CAN_STATE_STOPPED)
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bfin_can_set_reset_mode(dev);
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/* leave reset mode */
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bfin_can_set_normal_mode(dev);
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}
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static int bfin_can_set_mode(struct net_device *dev, enum can_mode mode)
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{
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switch (mode) {
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case CAN_MODE_START:
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bfin_can_start(dev);
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if (netif_queue_stopped(dev))
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netif_wake_queue(dev);
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break;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static int bfin_can_get_berr_counter(const struct net_device *dev,
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struct can_berr_counter *bec)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct bfin_can_regs __iomem *reg = priv->membase;
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u16 cec = bfin_read(®->cec);
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bec->txerr = cec >> 8;
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bec->rxerr = cec;
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return 0;
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}
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static int bfin_can_start_xmit(struct sk_buff *skb, struct net_device *dev)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct bfin_can_regs __iomem *reg = priv->membase;
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struct can_frame *cf = (struct can_frame *)skb->data;
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u8 dlc = cf->can_dlc;
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canid_t id = cf->can_id;
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u8 *data = cf->data;
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u16 val;
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int i;
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if (can_dropped_invalid_skb(dev, skb))
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return NETDEV_TX_OK;
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netif_stop_queue(dev);
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/* fill id */
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if (id & CAN_EFF_FLAG) {
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bfin_write(®->chl[TRANSMIT_CHL].id0, id);
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val = ((id & 0x1FFF0000) >> 16) | IDE;
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} else
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val = (id << 2);
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if (id & CAN_RTR_FLAG)
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val |= RTR;
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bfin_write(®->chl[TRANSMIT_CHL].id1, val | AME);
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/* fill payload */
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for (i = 0; i < 8; i += 2) {
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val = ((7 - i) < dlc ? (data[7 - i]) : 0) +
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((6 - i) < dlc ? (data[6 - i] << 8) : 0);
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bfin_write(®->chl[TRANSMIT_CHL].data[i], val);
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}
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/* fill data length code */
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bfin_write(®->chl[TRANSMIT_CHL].dlc, dlc);
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can_put_echo_skb(skb, dev, 0);
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/* set transmit request */
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bfin_write(®->trs2, BIT(TRANSMIT_CHL - 16));
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return 0;
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}
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static void bfin_can_rx(struct net_device *dev, u16 isrc)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct net_device_stats *stats = &dev->stats;
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struct bfin_can_regs __iomem *reg = priv->membase;
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struct can_frame *cf;
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struct sk_buff *skb;
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int obj;
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int i;
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u16 val;
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skb = alloc_can_skb(dev, &cf);
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if (skb == NULL)
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return;
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/* get id */
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if (isrc & BIT(RECEIVE_EXT_CHL)) {
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/* extended frame format (EFF) */
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cf->can_id = ((bfin_read(®->chl[RECEIVE_EXT_CHL].id1)
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& 0x1FFF) << 16)
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+ bfin_read(®->chl[RECEIVE_EXT_CHL].id0);
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cf->can_id |= CAN_EFF_FLAG;
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obj = RECEIVE_EXT_CHL;
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} else {
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/* standard frame format (SFF) */
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cf->can_id = (bfin_read(®->chl[RECEIVE_STD_CHL].id1)
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& 0x1ffc) >> 2;
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obj = RECEIVE_STD_CHL;
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}
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if (bfin_read(®->chl[obj].id1) & RTR)
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cf->can_id |= CAN_RTR_FLAG;
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/* get data length code */
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cf->can_dlc = get_can_dlc(bfin_read(®->chl[obj].dlc) & 0xF);
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/* get payload */
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for (i = 0; i < 8; i += 2) {
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val = bfin_read(®->chl[obj].data[i]);
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cf->data[7 - i] = (7 - i) < cf->can_dlc ? val : 0;
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cf->data[6 - i] = (6 - i) < cf->can_dlc ? (val >> 8) : 0;
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}
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netif_rx(skb);
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stats->rx_packets++;
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stats->rx_bytes += cf->can_dlc;
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}
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static int bfin_can_err(struct net_device *dev, u16 isrc, u16 status)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct bfin_can_regs __iomem *reg = priv->membase;
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struct net_device_stats *stats = &dev->stats;
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struct can_frame *cf;
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struct sk_buff *skb;
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enum can_state state = priv->can.state;
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skb = alloc_can_err_skb(dev, &cf);
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if (skb == NULL)
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return -ENOMEM;
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if (isrc & RMLIS) {
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/* data overrun interrupt */
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netdev_dbg(dev, "data overrun interrupt\n");
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cf->can_id |= CAN_ERR_CRTL;
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cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
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stats->rx_over_errors++;
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stats->rx_errors++;
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}
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if (isrc & BOIS) {
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netdev_dbg(dev, "bus-off mode interrupt\n");
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state = CAN_STATE_BUS_OFF;
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cf->can_id |= CAN_ERR_BUSOFF;
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can_bus_off(dev);
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}
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if (isrc & EPIS) {
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/* error passive interrupt */
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netdev_dbg(dev, "error passive interrupt\n");
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state = CAN_STATE_ERROR_PASSIVE;
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}
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if ((isrc & EWTIS) || (isrc & EWRIS)) {
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netdev_dbg(dev, "Error Warning Transmit/Receive Interrupt\n");
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state = CAN_STATE_ERROR_WARNING;
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}
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if (state != priv->can.state && (state == CAN_STATE_ERROR_WARNING ||
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state == CAN_STATE_ERROR_PASSIVE)) {
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u16 cec = bfin_read(®->cec);
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u8 rxerr = cec;
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u8 txerr = cec >> 8;
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cf->can_id |= CAN_ERR_CRTL;
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if (state == CAN_STATE_ERROR_WARNING) {
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priv->can.can_stats.error_warning++;
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cf->data[1] = (txerr > rxerr) ?
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CAN_ERR_CRTL_TX_WARNING :
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CAN_ERR_CRTL_RX_WARNING;
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} else {
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priv->can.can_stats.error_passive++;
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cf->data[1] = (txerr > rxerr) ?
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CAN_ERR_CRTL_TX_PASSIVE :
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CAN_ERR_CRTL_RX_PASSIVE;
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}
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}
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if (status) {
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priv->can.can_stats.bus_error++;
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cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
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if (status & BEF)
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cf->data[2] |= CAN_ERR_PROT_BIT;
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else if (status & FER)
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cf->data[2] |= CAN_ERR_PROT_FORM;
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else if (status & SER)
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cf->data[2] |= CAN_ERR_PROT_STUFF;
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else
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cf->data[2] |= CAN_ERR_PROT_UNSPEC;
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}
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priv->can.state = state;
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netif_rx(skb);
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stats->rx_packets++;
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stats->rx_bytes += cf->can_dlc;
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return 0;
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}
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static irqreturn_t bfin_can_interrupt(int irq, void *dev_id)
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{
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struct net_device *dev = dev_id;
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct bfin_can_regs __iomem *reg = priv->membase;
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struct net_device_stats *stats = &dev->stats;
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u16 status, isrc;
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if ((irq == priv->tx_irq) && bfin_read(®->mbtif2)) {
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/* transmission complete interrupt */
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bfin_write(®->mbtif2, 0xFFFF);
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stats->tx_packets++;
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stats->tx_bytes += bfin_read(®->chl[TRANSMIT_CHL].dlc);
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can_get_echo_skb(dev, 0);
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netif_wake_queue(dev);
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} else if ((irq == priv->rx_irq) && bfin_read(®->mbrif1)) {
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/* receive interrupt */
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isrc = bfin_read(®->mbrif1);
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bfin_write(®->mbrif1, 0xFFFF);
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bfin_can_rx(dev, isrc);
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} else if ((irq == priv->err_irq) && bfin_read(®->gis)) {
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/* error interrupt */
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isrc = bfin_read(®->gis);
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status = bfin_read(®->esr);
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bfin_write(®->gis, 0x7FF);
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bfin_can_err(dev, isrc, status);
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} else {
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return IRQ_NONE;
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}
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return IRQ_HANDLED;
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}
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static int bfin_can_open(struct net_device *dev)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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int err;
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/* set chip into reset mode */
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bfin_can_set_reset_mode(dev);
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/* common open */
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err = open_candev(dev);
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if (err)
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goto exit_open;
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/* register interrupt handler */
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err = request_irq(priv->rx_irq, &bfin_can_interrupt, 0,
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"bfin-can-rx", dev);
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if (err)
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goto exit_rx_irq;
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err = request_irq(priv->tx_irq, &bfin_can_interrupt, 0,
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"bfin-can-tx", dev);
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if (err)
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goto exit_tx_irq;
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err = request_irq(priv->err_irq, &bfin_can_interrupt, 0,
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"bfin-can-err", dev);
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if (err)
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goto exit_err_irq;
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bfin_can_start(dev);
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netif_start_queue(dev);
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return 0;
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exit_err_irq:
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free_irq(priv->tx_irq, dev);
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exit_tx_irq:
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free_irq(priv->rx_irq, dev);
|
|
exit_rx_irq:
|
|
close_candev(dev);
|
|
exit_open:
|
|
return err;
|
|
}
|
|
|
|
static int bfin_can_close(struct net_device *dev)
|
|
{
|
|
struct bfin_can_priv *priv = netdev_priv(dev);
|
|
|
|
netif_stop_queue(dev);
|
|
bfin_can_set_reset_mode(dev);
|
|
|
|
close_candev(dev);
|
|
|
|
free_irq(priv->rx_irq, dev);
|
|
free_irq(priv->tx_irq, dev);
|
|
free_irq(priv->err_irq, dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct net_device *alloc_bfin_candev(void)
|
|
{
|
|
struct net_device *dev;
|
|
struct bfin_can_priv *priv;
|
|
|
|
dev = alloc_candev(sizeof(*priv), TX_ECHO_SKB_MAX);
|
|
if (!dev)
|
|
return NULL;
|
|
|
|
priv = netdev_priv(dev);
|
|
|
|
priv->dev = dev;
|
|
priv->can.bittiming_const = &bfin_can_bittiming_const;
|
|
priv->can.do_set_bittiming = bfin_can_set_bittiming;
|
|
priv->can.do_set_mode = bfin_can_set_mode;
|
|
priv->can.do_get_berr_counter = bfin_can_get_berr_counter;
|
|
priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;
|
|
|
|
return dev;
|
|
}
|
|
|
|
static const struct net_device_ops bfin_can_netdev_ops = {
|
|
.ndo_open = bfin_can_open,
|
|
.ndo_stop = bfin_can_close,
|
|
.ndo_start_xmit = bfin_can_start_xmit,
|
|
.ndo_change_mtu = can_change_mtu,
|
|
};
|
|
|
|
static int bfin_can_probe(struct platform_device *pdev)
|
|
{
|
|
int err;
|
|
struct net_device *dev;
|
|
struct bfin_can_priv *priv;
|
|
struct resource *res_mem, *rx_irq, *tx_irq, *err_irq;
|
|
unsigned short *pdata;
|
|
|
|
pdata = dev_get_platdata(&pdev->dev);
|
|
if (!pdata) {
|
|
dev_err(&pdev->dev, "No platform data provided!\n");
|
|
err = -EINVAL;
|
|
goto exit;
|
|
}
|
|
|
|
res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
rx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
tx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
|
|
err_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 2);
|
|
if (!res_mem || !rx_irq || !tx_irq || !err_irq) {
|
|
err = -EINVAL;
|
|
goto exit;
|
|
}
|
|
|
|
if (!request_mem_region(res_mem->start, resource_size(res_mem),
|
|
dev_name(&pdev->dev))) {
|
|
err = -EBUSY;
|
|
goto exit;
|
|
}
|
|
|
|
/* request peripheral pins */
|
|
err = peripheral_request_list(pdata, dev_name(&pdev->dev));
|
|
if (err)
|
|
goto exit_mem_release;
|
|
|
|
dev = alloc_bfin_candev();
|
|
if (!dev) {
|
|
err = -ENOMEM;
|
|
goto exit_peri_pin_free;
|
|
}
|
|
|
|
priv = netdev_priv(dev);
|
|
priv->membase = (void __iomem *)res_mem->start;
|
|
priv->rx_irq = rx_irq->start;
|
|
priv->tx_irq = tx_irq->start;
|
|
priv->err_irq = err_irq->start;
|
|
priv->pin_list = pdata;
|
|
priv->can.clock.freq = get_sclk();
|
|
|
|
platform_set_drvdata(pdev, dev);
|
|
SET_NETDEV_DEV(dev, &pdev->dev);
|
|
|
|
dev->flags |= IFF_ECHO; /* we support local echo */
|
|
dev->netdev_ops = &bfin_can_netdev_ops;
|
|
|
|
bfin_can_set_reset_mode(dev);
|
|
|
|
err = register_candev(dev);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "registering failed (err=%d)\n", err);
|
|
goto exit_candev_free;
|
|
}
|
|
|
|
dev_info(&pdev->dev,
|
|
"%s device registered"
|
|
"(®_base=%p, rx_irq=%d, tx_irq=%d, err_irq=%d, sclk=%d)\n",
|
|
DRV_NAME, priv->membase, priv->rx_irq,
|
|
priv->tx_irq, priv->err_irq, priv->can.clock.freq);
|
|
return 0;
|
|
|
|
exit_candev_free:
|
|
free_candev(dev);
|
|
exit_peri_pin_free:
|
|
peripheral_free_list(pdata);
|
|
exit_mem_release:
|
|
release_mem_region(res_mem->start, resource_size(res_mem));
|
|
exit:
|
|
return err;
|
|
}
|
|
|
|
static int bfin_can_remove(struct platform_device *pdev)
|
|
{
|
|
struct net_device *dev = platform_get_drvdata(pdev);
|
|
struct bfin_can_priv *priv = netdev_priv(dev);
|
|
struct resource *res;
|
|
|
|
bfin_can_set_reset_mode(dev);
|
|
|
|
unregister_candev(dev);
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
release_mem_region(res->start, resource_size(res));
|
|
|
|
peripheral_free_list(priv->pin_list);
|
|
|
|
free_candev(dev);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int bfin_can_suspend(struct platform_device *pdev, pm_message_t mesg)
|
|
{
|
|
struct net_device *dev = platform_get_drvdata(pdev);
|
|
struct bfin_can_priv *priv = netdev_priv(dev);
|
|
struct bfin_can_regs __iomem *reg = priv->membase;
|
|
int timeout = BFIN_CAN_TIMEOUT;
|
|
|
|
if (netif_running(dev)) {
|
|
/* enter sleep mode */
|
|
bfin_write(®->control, bfin_read(®->control) | SMR);
|
|
SSYNC();
|
|
while (!(bfin_read(®->intr) & SMACK)) {
|
|
udelay(10);
|
|
if (--timeout == 0) {
|
|
netdev_err(dev, "fail to enter sleep mode\n");
|
|
BUG();
|
|
}
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int bfin_can_resume(struct platform_device *pdev)
|
|
{
|
|
struct net_device *dev = platform_get_drvdata(pdev);
|
|
struct bfin_can_priv *priv = netdev_priv(dev);
|
|
struct bfin_can_regs __iomem *reg = priv->membase;
|
|
|
|
if (netif_running(dev)) {
|
|
/* leave sleep mode */
|
|
bfin_write(®->intr, 0);
|
|
SSYNC();
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#else
|
|
#define bfin_can_suspend NULL
|
|
#define bfin_can_resume NULL
|
|
#endif /* CONFIG_PM */
|
|
|
|
static struct platform_driver bfin_can_driver = {
|
|
.probe = bfin_can_probe,
|
|
.remove = bfin_can_remove,
|
|
.suspend = bfin_can_suspend,
|
|
.resume = bfin_can_resume,
|
|
.driver = {
|
|
.name = DRV_NAME,
|
|
.owner = THIS_MODULE,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(bfin_can_driver);
|
|
|
|
MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION("Blackfin on-chip CAN netdevice driver");
|
|
MODULE_ALIAS("platform:" DRV_NAME);
|