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20f07a044a
SEV and TDX both protect guest memory from host accesses. They both use guest physical address bits to communicate to the hardware which pages receive protection or not. SEV and TDX both assume that all I/O (real devices and virtio) must be performed to pages *without* protection. To add this support, AMD SEV code forces force_dma_unencrypted() to decrypt DMA pages when DMA pages were allocated for I/O. It also uses swiotlb_update_mem_attributes() to update decryption bits in SWIOTLB DMA buffers. Since TDX also uses a similar memory sharing design, all the above mentioned changes can be reused. So move force_dma_unencrypted(), SWIOTLB update code and virtio changes out of mem_encrypt_amd.c to mem_encrypt.c. Introduce a new config option X86_MEM_ENCRYPT that can be selected by platforms which use x86 memory encryption features (needed in both AMD SEV and Intel TDX guest platforms). Since the code is moved from mem_encrypt_amd.c, inherit the same make flags. This is preparation for enabling TDX memory encryption support and it has no functional changes. Co-developed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Andi Kleen <ak@linux.intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Link: https://lore.kernel.org/r/20211206135505.75045-4-kirill.shutemov@linux.intel.com
84 lines
2 KiB
C
84 lines
2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Memory Encryption Support Common Code
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*
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* Copyright (C) 2016 Advanced Micro Devices, Inc.
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*
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* Author: Tom Lendacky <thomas.lendacky@amd.com>
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*/
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#include <linux/dma-direct.h>
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#include <linux/dma-mapping.h>
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#include <linux/swiotlb.h>
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#include <linux/cc_platform.h>
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#include <linux/mem_encrypt.h>
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#include <linux/virtio_config.h>
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/* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */
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bool force_dma_unencrypted(struct device *dev)
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{
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/*
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* For SEV, all DMA must be to unencrypted addresses.
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*/
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if (cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))
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return true;
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/*
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* For SME, all DMA must be to unencrypted addresses if the
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* device does not support DMA to addresses that include the
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* encryption mask.
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*/
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if (cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT)) {
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u64 dma_enc_mask = DMA_BIT_MASK(__ffs64(sme_me_mask));
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u64 dma_dev_mask = min_not_zero(dev->coherent_dma_mask,
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dev->bus_dma_limit);
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if (dma_dev_mask <= dma_enc_mask)
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return true;
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}
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return false;
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}
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static void print_mem_encrypt_feature_info(void)
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{
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pr_info("AMD Memory Encryption Features active:");
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/* Secure Memory Encryption */
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if (cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT)) {
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/*
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* SME is mutually exclusive with any of the SEV
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* features below.
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*/
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pr_cont(" SME\n");
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return;
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}
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/* Secure Encrypted Virtualization */
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if (cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))
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pr_cont(" SEV");
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/* Encrypted Register State */
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if (cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
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pr_cont(" SEV-ES");
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pr_cont("\n");
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}
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/* Architecture __weak replacement functions */
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void __init mem_encrypt_init(void)
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{
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if (!cc_platform_has(CC_ATTR_MEM_ENCRYPT))
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return;
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/* Call into SWIOTLB to update the SWIOTLB DMA buffers */
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swiotlb_update_mem_attributes();
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print_mem_encrypt_feature_info();
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}
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int arch_has_restricted_virtio_memory_access(void)
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{
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return cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT);
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}
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EXPORT_SYMBOL_GPL(arch_has_restricted_virtio_memory_access);
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