mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-03 17:40:04 +00:00
54e4026b64
This patch adds support for i.MX3x (only tested with i.MX31 so far) ARM SoCs to the fsl_usb2_udc driver. It also moves PHY configuration before controller reset, because otherwise an ULPI PHY doesn't get a reset and doesn't function after a reboot. The problem with longer control transfers is still not fixed. The patch renames the fsl_usb2_udc.c file to fsl_udc_core.c to preserve the same module name for user-space backwards compatibility. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
95 lines
2.2 KiB
C
95 lines
2.2 KiB
C
/*
|
|
* Copyright (C) 2009
|
|
* Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
|
|
*
|
|
* Description:
|
|
* Helper routines for i.MX3x SoCs from Freescale, needed by the fsl_usb2_udc.c
|
|
* driver to function correctly on these systems.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
* Free Software Foundation; either version 2 of the License, or (at your
|
|
* option) any later version.
|
|
*/
|
|
#include <linux/clk.h>
|
|
#include <linux/delay.h>
|
|
#include <linux/err.h>
|
|
#include <linux/fsl_devices.h>
|
|
#include <linux/platform_device.h>
|
|
|
|
static struct clk *mxc_ahb_clk;
|
|
static struct clk *mxc_usb_clk;
|
|
|
|
int fsl_udc_clk_init(struct platform_device *pdev)
|
|
{
|
|
struct fsl_usb2_platform_data *pdata;
|
|
unsigned long freq;
|
|
int ret;
|
|
|
|
pdata = pdev->dev.platform_data;
|
|
|
|
mxc_ahb_clk = clk_get(&pdev->dev, "usb_ahb");
|
|
if (IS_ERR(mxc_ahb_clk))
|
|
return PTR_ERR(mxc_ahb_clk);
|
|
|
|
ret = clk_enable(mxc_ahb_clk);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "clk_enable(\"usb_ahb\") failed\n");
|
|
goto eenahb;
|
|
}
|
|
|
|
/* make sure USB_CLK is running at 60 MHz +/- 1000 Hz */
|
|
mxc_usb_clk = clk_get(&pdev->dev, "usb");
|
|
if (IS_ERR(mxc_usb_clk)) {
|
|
dev_err(&pdev->dev, "clk_get(\"usb\") failed\n");
|
|
ret = PTR_ERR(mxc_usb_clk);
|
|
goto egusb;
|
|
}
|
|
|
|
freq = clk_get_rate(mxc_usb_clk);
|
|
if (pdata->phy_mode != FSL_USB2_PHY_ULPI &&
|
|
(freq < 59999000 || freq > 60001000)) {
|
|
dev_err(&pdev->dev, "USB_CLK=%lu, should be 60MHz\n", freq);
|
|
goto eclkrate;
|
|
}
|
|
|
|
ret = clk_enable(mxc_usb_clk);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "clk_enable(\"usb_clk\") failed\n");
|
|
goto eenusb;
|
|
}
|
|
|
|
return 0;
|
|
|
|
eenusb:
|
|
eclkrate:
|
|
clk_put(mxc_usb_clk);
|
|
mxc_usb_clk = NULL;
|
|
egusb:
|
|
clk_disable(mxc_ahb_clk);
|
|
eenahb:
|
|
clk_put(mxc_ahb_clk);
|
|
return ret;
|
|
}
|
|
|
|
void fsl_udc_clk_finalize(struct platform_device *pdev)
|
|
{
|
|
struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
|
|
|
|
/* ULPI transceivers don't need usbpll */
|
|
if (pdata->phy_mode == FSL_USB2_PHY_ULPI) {
|
|
clk_disable(mxc_usb_clk);
|
|
clk_put(mxc_usb_clk);
|
|
mxc_usb_clk = NULL;
|
|
}
|
|
}
|
|
|
|
void fsl_udc_clk_release(void)
|
|
{
|
|
if (mxc_usb_clk) {
|
|
clk_disable(mxc_usb_clk);
|
|
clk_put(mxc_usb_clk);
|
|
}
|
|
clk_disable(mxc_ahb_clk);
|
|
clk_put(mxc_ahb_clk);
|
|
}
|