Sergei Shtylyov 304e21bbea ssb: PCI revision ID register is 8-bit wide ... The SSB code reads PCI revision ID register as 16-bit entity while the register is actually 8-bit only (the next 8 bits are the programming interface register). Fix the read and make the 'rev' field of 'struct ssb_boardinfo' 8-bit as well, to match the register size. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>		2011-07-05 15:26:55 -04:00
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ssb.h	ssb: PCI revision ID register is 8-bit wide	2011-07-05 15:26:55 -04:00
ssb_driver_chipcommon.h	ssb: cc: clear GPIOPULL registers on init	2011-04-25 14:50:20 -04:00
ssb_driver_extif.h
ssb_driver_gige.h	SSB: Fix nvram_get on BCM47xx platform	2010-12-16 18:11:00 +00:00
ssb_driver_mips.h
ssb_driver_pci.h
ssb_embedded.h
ssb_regs.h	ssb: update reject bit for Target State Low	2011-04-26 15:50:29 -04:00