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1ac832509f
The Andes FPU coprocessor does not support denormalized number handling. According to the specification, FPU generates a denorm input exception that requires the kernel to deal with this instrution operation when it encounters denormalized operands. Hence an nds32 FPU ISA emulator in the kernel is required to meet requirement. Signed-off-by: Vincent Chen <vincentc@andestech.com> Signed-off-by: Nickhu <nickhu@andestech.com> Acked-by: Greentime Hu <greentime@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com>
252 lines
6.3 KiB
C
252 lines
6.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2018 Andes Technology Corporation
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#include <linux/sched.h>
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#include <linux/signal.h>
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#include <linux/sched/signal.h>
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#include <asm/processor.h>
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#include <asm/user.h>
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#include <asm/io.h>
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#include <asm/bitfield.h>
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#include <asm/fpu.h>
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const struct fpu_struct init_fpuregs = {
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.fd_regs = {[0 ... 31] = sNAN64},
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.fpcsr = FPCSR_INIT
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};
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void save_fpu(struct task_struct *tsk)
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{
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unsigned int fpcfg, fpcsr;
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enable_fpu();
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fpcfg = ((__nds32__fmfcfg() & FPCFG_mskFREG) >> FPCFG_offFREG);
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switch (fpcfg) {
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case SP32_DP32_reg:
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asm volatile ("fsdi $fd31, [%0+0xf8]\n\t"
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"fsdi $fd30, [%0+0xf0]\n\t"
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"fsdi $fd29, [%0+0xe8]\n\t"
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"fsdi $fd28, [%0+0xe0]\n\t"
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"fsdi $fd27, [%0+0xd8]\n\t"
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"fsdi $fd26, [%0+0xd0]\n\t"
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"fsdi $fd25, [%0+0xc8]\n\t"
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"fsdi $fd24, [%0+0xc0]\n\t"
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"fsdi $fd23, [%0+0xb8]\n\t"
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"fsdi $fd22, [%0+0xb0]\n\t"
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"fsdi $fd21, [%0+0xa8]\n\t"
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"fsdi $fd20, [%0+0xa0]\n\t"
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"fsdi $fd19, [%0+0x98]\n\t"
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"fsdi $fd18, [%0+0x90]\n\t"
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"fsdi $fd17, [%0+0x88]\n\t"
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"fsdi $fd16, [%0+0x80]\n\t"
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: /* no output */
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: "r" (&tsk->thread.fpu)
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: "memory");
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/* fall through */
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case SP32_DP16_reg:
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asm volatile ("fsdi $fd15, [%0+0x78]\n\t"
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"fsdi $fd14, [%0+0x70]\n\t"
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"fsdi $fd13, [%0+0x68]\n\t"
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"fsdi $fd12, [%0+0x60]\n\t"
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"fsdi $fd11, [%0+0x58]\n\t"
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"fsdi $fd10, [%0+0x50]\n\t"
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"fsdi $fd9, [%0+0x48]\n\t"
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"fsdi $fd8, [%0+0x40]\n\t"
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: /* no output */
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: "r" (&tsk->thread.fpu)
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: "memory");
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/* fall through */
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case SP16_DP8_reg:
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asm volatile ("fsdi $fd7, [%0+0x38]\n\t"
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"fsdi $fd6, [%0+0x30]\n\t"
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"fsdi $fd5, [%0+0x28]\n\t"
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"fsdi $fd4, [%0+0x20]\n\t"
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: /* no output */
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: "r" (&tsk->thread.fpu)
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: "memory");
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/* fall through */
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case SP8_DP4_reg:
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asm volatile ("fsdi $fd3, [%1+0x18]\n\t"
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"fsdi $fd2, [%1+0x10]\n\t"
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"fsdi $fd1, [%1+0x8]\n\t"
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"fsdi $fd0, [%1+0x0]\n\t"
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"fmfcsr %0\n\t"
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"swi %0, [%1+0x100]\n\t"
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: "=&r" (fpcsr)
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: "r"(&tsk->thread.fpu)
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: "memory");
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}
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disable_fpu();
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}
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void load_fpu(const struct fpu_struct *fpregs)
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{
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unsigned int fpcfg, fpcsr;
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enable_fpu();
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fpcfg = ((__nds32__fmfcfg() & FPCFG_mskFREG) >> FPCFG_offFREG);
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switch (fpcfg) {
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case SP32_DP32_reg:
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asm volatile ("fldi $fd31, [%0+0xf8]\n\t"
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"fldi $fd30, [%0+0xf0]\n\t"
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"fldi $fd29, [%0+0xe8]\n\t"
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"fldi $fd28, [%0+0xe0]\n\t"
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"fldi $fd27, [%0+0xd8]\n\t"
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"fldi $fd26, [%0+0xd0]\n\t"
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"fldi $fd25, [%0+0xc8]\n\t"
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"fldi $fd24, [%0+0xc0]\n\t"
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"fldi $fd23, [%0+0xb8]\n\t"
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"fldi $fd22, [%0+0xb0]\n\t"
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"fldi $fd21, [%0+0xa8]\n\t"
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"fldi $fd20, [%0+0xa0]\n\t"
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"fldi $fd19, [%0+0x98]\n\t"
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"fldi $fd18, [%0+0x90]\n\t"
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"fldi $fd17, [%0+0x88]\n\t"
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"fldi $fd16, [%0+0x80]\n\t"
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: /* no output */
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: "r" (fpregs));
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/* fall through */
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case SP32_DP16_reg:
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asm volatile ("fldi $fd15, [%0+0x78]\n\t"
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"fldi $fd14, [%0+0x70]\n\t"
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"fldi $fd13, [%0+0x68]\n\t"
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"fldi $fd12, [%0+0x60]\n\t"
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"fldi $fd11, [%0+0x58]\n\t"
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"fldi $fd10, [%0+0x50]\n\t"
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"fldi $fd9, [%0+0x48]\n\t"
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"fldi $fd8, [%0+0x40]\n\t"
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: /* no output */
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: "r" (fpregs));
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/* fall through */
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case SP16_DP8_reg:
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asm volatile ("fldi $fd7, [%0+0x38]\n\t"
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"fldi $fd6, [%0+0x30]\n\t"
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"fldi $fd5, [%0+0x28]\n\t"
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"fldi $fd4, [%0+0x20]\n\t"
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: /* no output */
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: "r" (fpregs));
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/* fall through */
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case SP8_DP4_reg:
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asm volatile ("fldi $fd3, [%1+0x18]\n\t"
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"fldi $fd2, [%1+0x10]\n\t"
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"fldi $fd1, [%1+0x8]\n\t"
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"fldi $fd0, [%1+0x0]\n\t"
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"lwi %0, [%1+0x100]\n\t"
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"fmtcsr %0\n\t":"=&r" (fpcsr)
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: "r"(fpregs));
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}
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disable_fpu();
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}
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void store_fpu_for_suspend(void)
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{
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#ifdef CONFIG_LAZY_FPU
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if (last_task_used_math != NULL)
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save_fpu(last_task_used_math);
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last_task_used_math = NULL;
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#else
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if (!used_math())
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return;
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unlazy_fpu(current);
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#endif
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clear_fpu(task_pt_regs(current));
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}
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inline void do_fpu_context_switch(struct pt_regs *regs)
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{
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/* Enable to use FPU. */
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if (!user_mode(regs)) {
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pr_err("BUG: FPU is used in kernel mode.\n");
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BUG();
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return;
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}
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enable_ptreg_fpu(regs);
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#ifdef CONFIG_LAZY_FPU //Lazy FPU is used
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if (last_task_used_math == current)
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return;
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if (last_task_used_math != NULL)
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/* Other processes fpu state, save away */
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save_fpu(last_task_used_math);
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last_task_used_math = current;
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#endif
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if (used_math()) {
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load_fpu(¤t->thread.fpu);
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} else {
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/* First time FPU user. */
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load_fpu(&init_fpuregs);
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set_used_math();
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}
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}
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inline void fill_sigfpe_signo(unsigned int fpcsr, int *signo)
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{
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if (fpcsr & FPCSR_mskOVFT)
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*signo = FPE_FLTOVF;
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else if (fpcsr & FPCSR_mskIVOT)
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*signo = FPE_FLTINV;
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else if (fpcsr & FPCSR_mskUDFT)
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*signo = FPE_FLTUND;
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else if (fpcsr & FPCSR_mskDBZT)
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*signo = FPE_FLTDIV;
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else if (fpcsr & FPCSR_mskIEXT)
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*signo = FPE_FLTRES;
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}
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inline void handle_fpu_exception(struct pt_regs *regs)
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{
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unsigned int fpcsr;
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int si_code = 0, si_signo = SIGFPE;
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lose_fpu();
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fpcsr = current->thread.fpu.fpcsr;
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if (fpcsr & FPCSR_mskDNIT) {
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si_signo = do_fpuemu(regs, ¤t->thread.fpu);
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fpcsr = current->thread.fpu.fpcsr;
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if (!si_signo)
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goto done;
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} else if (fpcsr & FPCSR_mskRIT) {
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if (!user_mode(regs))
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do_exit(SIGILL);
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si_signo = SIGILL;
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}
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switch (si_signo) {
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case SIGFPE:
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fill_sigfpe_signo(fpcsr, &si_code);
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break;
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case SIGILL:
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show_regs(regs);
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si_code = ILL_COPROC;
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break;
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case SIGBUS:
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si_code = BUS_ADRERR;
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break;
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default:
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break;
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}
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force_sig_fault(si_signo, si_code,
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(void __user *)instruction_pointer(regs), current);
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done:
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own_fpu();
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}
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bool do_fpu_exception(unsigned int subtype, struct pt_regs *regs)
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{
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int done = true;
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/* Coprocessor disabled exception */
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if (subtype == FPU_DISABLE_EXCEPTION) {
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preempt_disable();
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do_fpu_context_switch(regs);
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preempt_enable();
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}
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/* Coprocessor exception such as underflow and overflow */
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else if (subtype == FPU_EXCEPTION)
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handle_fpu_exception(regs);
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else
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done = false;
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return done;
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}
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