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![Oleksij Rempel](/assets/img/avatar_default.png)
Add spi_device_id to silent following kernel runtime warning: "SPI driver tsc2046 has no spi_device_id for ti,tsc2046e-adc". Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220904100203.3614502-3-o.rempel@pengutronix.de Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
912 lines
24 KiB
C
912 lines
24 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Texas Instruments TSC2046 SPI ADC driver
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*
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* Copyright (c) 2021 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
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*/
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#include <linux/bitfield.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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#include <linux/units.h>
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#include <asm/unaligned.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/trigger.h>
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/*
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* The PENIRQ of TSC2046 controller is implemented as level shifter attached to
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* the X+ line. If voltage of the X+ line reaches a specific level the IRQ will
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* be activated or deactivated.
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* To make this kind of IRQ reusable as trigger following additions were
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* implemented:
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* - rate limiting:
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* For typical touchscreen use case, we need to trigger about each 10ms.
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* - hrtimer:
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* Continue triggering at least once after the IRQ was deactivated. Then
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* deactivate this trigger to stop sampling in order to reduce power
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* consumption.
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*/
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#define TI_TSC2046_NAME "tsc2046"
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/* This driver doesn't aim at the peak continuous sample rate */
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#define TI_TSC2046_MAX_SAMPLE_RATE 125000
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#define TI_TSC2046_SAMPLE_BITS \
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BITS_PER_TYPE(struct tsc2046_adc_atom)
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#define TI_TSC2046_MAX_CLK_FREQ \
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(TI_TSC2046_MAX_SAMPLE_RATE * TI_TSC2046_SAMPLE_BITS)
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#define TI_TSC2046_SAMPLE_INTERVAL_US 10000
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#define TI_TSC2046_START BIT(7)
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#define TI_TSC2046_ADDR GENMASK(6, 4)
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#define TI_TSC2046_ADDR_TEMP1 7
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#define TI_TSC2046_ADDR_AUX 6
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#define TI_TSC2046_ADDR_X 5
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#define TI_TSC2046_ADDR_Z2 4
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#define TI_TSC2046_ADDR_Z1 3
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#define TI_TSC2046_ADDR_VBAT 2
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#define TI_TSC2046_ADDR_Y 1
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#define TI_TSC2046_ADDR_TEMP0 0
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/*
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* The mode bit sets the resolution of the ADC. With this bit low, the next
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* conversion has 12-bit resolution, whereas with this bit high, the next
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* conversion has 8-bit resolution. This driver is optimized for 12-bit mode.
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* So, for this driver, this bit should stay zero.
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*/
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#define TI_TSC2046_8BIT_MODE BIT(3)
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/*
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* SER/DFR - The SER/DFR bit controls the reference mode, either single-ended
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* (high) or differential (low).
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*/
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#define TI_TSC2046_SER BIT(2)
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/*
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* If VREF_ON and ADC_ON are both zero, then the chip operates in
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* auto-wake/suspend mode. In most case this bits should stay zero.
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*/
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#define TI_TSC2046_PD1_VREF_ON BIT(1)
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#define TI_TSC2046_PD0_ADC_ON BIT(0)
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/*
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* All supported devices can do 8 or 12bit resolution. This driver
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* supports only 12bit mode, here we have a 16bit data transfer, where
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* the MSB and the 3 LSB are 0.
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*/
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#define TI_TSC2046_DATA_12BIT GENMASK(14, 3)
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#define TI_TSC2046_MAX_CHAN 8
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#define TI_TSC2046_MIN_POLL_CNT 3
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#define TI_TSC2046_EXT_POLL_CNT 3
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#define TI_TSC2046_POLL_CNT \
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(TI_TSC2046_MIN_POLL_CNT + TI_TSC2046_EXT_POLL_CNT)
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#define TI_TSC2046_INT_VREF 2500
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/* Represents a HW sample */
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struct tsc2046_adc_atom {
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/*
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* Command transmitted to the controller. This field is empty on the RX
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* buffer.
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*/
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u8 cmd;
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/*
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* Data received from the controller. This field is empty for the TX
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* buffer
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*/
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__be16 data;
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} __packed;
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/* Layout of atomic buffers within big buffer */
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struct tsc2046_adc_group_layout {
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/* Group offset within the SPI RX buffer */
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unsigned int offset;
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/*
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* Amount of tsc2046_adc_atom structs within the same command gathered
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* within same group.
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*/
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unsigned int count;
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/*
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* Settling samples (tsc2046_adc_atom structs) which should be skipped
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* before good samples will start.
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*/
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unsigned int skip;
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};
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struct tsc2046_adc_dcfg {
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const struct iio_chan_spec *channels;
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unsigned int num_channels;
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};
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struct tsc2046_adc_ch_cfg {
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unsigned int settling_time_us;
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unsigned int oversampling_ratio;
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};
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enum tsc2046_state {
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TSC2046_STATE_SHUTDOWN,
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TSC2046_STATE_STANDBY,
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TSC2046_STATE_POLL,
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TSC2046_STATE_POLL_IRQ_DISABLE,
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TSC2046_STATE_ENABLE_IRQ,
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};
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struct tsc2046_adc_priv {
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struct spi_device *spi;
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const struct tsc2046_adc_dcfg *dcfg;
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struct regulator *vref_reg;
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struct iio_trigger *trig;
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struct hrtimer trig_timer;
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enum tsc2046_state state;
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int poll_cnt;
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spinlock_t state_lock;
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struct spi_transfer xfer;
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struct spi_message msg;
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struct {
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/* Scan data for each channel */
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u16 data[TI_TSC2046_MAX_CHAN];
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/* Timestamp */
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s64 ts __aligned(8);
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} scan_buf;
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/*
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* Lock to protect the layout and the SPI transfer buffer.
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* tsc2046_adc_group_layout can be changed within update_scan_mode(),
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* in this case the l[] and tx/rx buffer will be out of sync to each
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* other.
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*/
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struct mutex slock;
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struct tsc2046_adc_group_layout l[TI_TSC2046_MAX_CHAN];
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struct tsc2046_adc_atom *rx;
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struct tsc2046_adc_atom *tx;
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unsigned int count;
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unsigned int groups;
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u32 effective_speed_hz;
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u32 scan_interval_us;
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u32 time_per_scan_us;
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u32 time_per_bit_ns;
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unsigned int vref_mv;
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struct tsc2046_adc_ch_cfg ch_cfg[TI_TSC2046_MAX_CHAN];
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};
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#define TI_TSC2046_V_CHAN(index, bits, name) \
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{ \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = index, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.datasheet_name = "#name", \
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.scan_index = index, \
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.scan_type = { \
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.sign = 'u', \
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.realbits = bits, \
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.storagebits = 16, \
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.endianness = IIO_CPU, \
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}, \
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}
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#define DECLARE_TI_TSC2046_8_CHANNELS(name, bits) \
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const struct iio_chan_spec name ## _channels[] = { \
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TI_TSC2046_V_CHAN(0, bits, TEMP0), \
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TI_TSC2046_V_CHAN(1, bits, Y), \
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TI_TSC2046_V_CHAN(2, bits, VBAT), \
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TI_TSC2046_V_CHAN(3, bits, Z1), \
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TI_TSC2046_V_CHAN(4, bits, Z2), \
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TI_TSC2046_V_CHAN(5, bits, X), \
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TI_TSC2046_V_CHAN(6, bits, AUX), \
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TI_TSC2046_V_CHAN(7, bits, TEMP1), \
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IIO_CHAN_SOFT_TIMESTAMP(8), \
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}
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static DECLARE_TI_TSC2046_8_CHANNELS(tsc2046_adc, 12);
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static const struct tsc2046_adc_dcfg tsc2046_adc_dcfg_tsc2046e = {
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.channels = tsc2046_adc_channels,
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.num_channels = ARRAY_SIZE(tsc2046_adc_channels),
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};
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/*
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* Convert time to a number of samples which can be transferred within this
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* time.
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*/
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static unsigned int tsc2046_adc_time_to_count(struct tsc2046_adc_priv *priv,
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unsigned long time)
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{
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unsigned int bit_count, sample_count;
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bit_count = DIV_ROUND_UP(time * NSEC_PER_USEC, priv->time_per_bit_ns);
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sample_count = DIV_ROUND_UP(bit_count, TI_TSC2046_SAMPLE_BITS);
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dev_dbg(&priv->spi->dev, "Effective speed %u, time per bit: %u, count bits: %u, count samples: %u\n",
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priv->effective_speed_hz, priv->time_per_bit_ns,
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bit_count, sample_count);
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return sample_count;
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}
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static u8 tsc2046_adc_get_cmd(struct tsc2046_adc_priv *priv, int ch_idx,
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bool keep_power)
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{
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u32 pd;
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/*
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* if PD bits are 0, controller will automatically disable ADC, VREF and
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* enable IRQ.
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*/
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if (keep_power)
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pd = TI_TSC2046_PD0_ADC_ON;
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else
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pd = 0;
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switch (ch_idx) {
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case TI_TSC2046_ADDR_TEMP1:
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case TI_TSC2046_ADDR_AUX:
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case TI_TSC2046_ADDR_VBAT:
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case TI_TSC2046_ADDR_TEMP0:
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pd |= TI_TSC2046_SER;
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if (!priv->vref_reg)
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pd |= TI_TSC2046_PD1_VREF_ON;
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}
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return TI_TSC2046_START | FIELD_PREP(TI_TSC2046_ADDR, ch_idx) | pd;
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}
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static u16 tsc2046_adc_get_value(struct tsc2046_adc_atom *buf)
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{
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return FIELD_GET(TI_TSC2046_DATA_12BIT, get_unaligned_be16(&buf->data));
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}
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static int tsc2046_adc_read_one(struct tsc2046_adc_priv *priv, int ch_idx,
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u32 *effective_speed_hz)
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{
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struct tsc2046_adc_ch_cfg *ch = &priv->ch_cfg[ch_idx];
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struct tsc2046_adc_atom *rx_buf, *tx_buf;
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unsigned int val, val_normalized = 0;
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int ret, i, count_skip = 0, max_count;
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struct spi_transfer xfer;
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struct spi_message msg;
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u8 cmd;
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if (!effective_speed_hz) {
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count_skip = tsc2046_adc_time_to_count(priv, ch->settling_time_us);
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max_count = count_skip + ch->oversampling_ratio;
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} else {
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max_count = 1;
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}
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if (sizeof(*tx_buf) * max_count > PAGE_SIZE)
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return -ENOSPC;
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tx_buf = kcalloc(max_count, sizeof(*tx_buf), GFP_KERNEL);
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if (!tx_buf)
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return -ENOMEM;
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rx_buf = kcalloc(max_count, sizeof(*rx_buf), GFP_KERNEL);
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if (!rx_buf) {
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ret = -ENOMEM;
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goto free_tx;
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}
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/*
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* Do not enable automatic power down on working samples. Otherwise the
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* plates will never be completely charged.
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*/
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cmd = tsc2046_adc_get_cmd(priv, ch_idx, true);
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for (i = 0; i < max_count - 1; i++)
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tx_buf[i].cmd = cmd;
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/* automatically power down on last sample */
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tx_buf[i].cmd = tsc2046_adc_get_cmd(priv, ch_idx, false);
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memset(&xfer, 0, sizeof(xfer));
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xfer.tx_buf = tx_buf;
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xfer.rx_buf = rx_buf;
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xfer.len = sizeof(*tx_buf) * max_count;
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spi_message_init_with_transfers(&msg, &xfer, 1);
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/*
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* We aren't using spi_write_then_read() because we need to be able
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* to get hold of the effective_speed_hz from the xfer
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*/
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ret = spi_sync(priv->spi, &msg);
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if (ret) {
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dev_err_ratelimited(&priv->spi->dev, "SPI transfer failed %pe\n",
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ERR_PTR(ret));
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goto free_bufs;
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}
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if (effective_speed_hz)
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*effective_speed_hz = xfer.effective_speed_hz;
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for (i = 0; i < max_count - count_skip; i++) {
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val = tsc2046_adc_get_value(&rx_buf[count_skip + i]);
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val_normalized += val;
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}
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ret = DIV_ROUND_UP(val_normalized, max_count - count_skip);
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free_bufs:
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kfree(rx_buf);
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free_tx:
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kfree(tx_buf);
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return ret;
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}
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static size_t tsc2046_adc_group_set_layout(struct tsc2046_adc_priv *priv,
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unsigned int group,
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unsigned int ch_idx)
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{
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struct tsc2046_adc_ch_cfg *ch = &priv->ch_cfg[ch_idx];
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struct tsc2046_adc_group_layout *cur;
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unsigned int max_count, count_skip;
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unsigned int offset = 0;
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if (group)
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offset = priv->l[group - 1].offset + priv->l[group - 1].count;
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count_skip = tsc2046_adc_time_to_count(priv, ch->settling_time_us);
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max_count = count_skip + ch->oversampling_ratio;
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cur = &priv->l[group];
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cur->offset = offset;
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cur->count = max_count;
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cur->skip = count_skip;
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return sizeof(*priv->tx) * max_count;
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}
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static void tsc2046_adc_group_set_cmd(struct tsc2046_adc_priv *priv,
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unsigned int group, int ch_idx)
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{
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struct tsc2046_adc_group_layout *l = &priv->l[group];
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unsigned int i;
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u8 cmd;
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/*
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* Do not enable automatic power down on working samples. Otherwise the
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* plates will never be completely charged.
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*/
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cmd = tsc2046_adc_get_cmd(priv, ch_idx, true);
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for (i = 0; i < l->count - 1; i++)
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priv->tx[l->offset + i].cmd = cmd;
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/* automatically power down on last sample */
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priv->tx[l->offset + i].cmd = tsc2046_adc_get_cmd(priv, ch_idx, false);
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}
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static u16 tsc2046_adc_get_val(struct tsc2046_adc_priv *priv, int group)
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{
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struct tsc2046_adc_group_layout *l;
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unsigned int val, val_normalized = 0;
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int valid_count, i;
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l = &priv->l[group];
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valid_count = l->count - l->skip;
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for (i = 0; i < valid_count; i++) {
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val = tsc2046_adc_get_value(&priv->rx[l->offset + l->skip + i]);
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val_normalized += val;
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}
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return DIV_ROUND_UP(val_normalized, valid_count);
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}
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static int tsc2046_adc_scan(struct iio_dev *indio_dev)
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{
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struct tsc2046_adc_priv *priv = iio_priv(indio_dev);
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struct device *dev = &priv->spi->dev;
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int group;
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int ret;
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ret = spi_sync(priv->spi, &priv->msg);
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if (ret < 0) {
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dev_err_ratelimited(dev, "SPI transfer failed: %pe\n", ERR_PTR(ret));
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return ret;
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}
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for (group = 0; group < priv->groups; group++)
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priv->scan_buf.data[group] = tsc2046_adc_get_val(priv, group);
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ret = iio_push_to_buffers_with_timestamp(indio_dev, &priv->scan_buf,
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iio_get_time_ns(indio_dev));
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/* If the consumer is kfifo, we may get a EBUSY here - ignore it. */
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if (ret < 0 && ret != -EBUSY) {
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dev_err_ratelimited(dev, "Failed to push scan buffer %pe\n",
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ERR_PTR(ret));
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return ret;
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}
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return 0;
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}
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static irqreturn_t tsc2046_adc_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct tsc2046_adc_priv *priv = iio_priv(indio_dev);
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mutex_lock(&priv->slock);
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tsc2046_adc_scan(indio_dev);
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mutex_unlock(&priv->slock);
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static int tsc2046_adc_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long m)
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{
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struct tsc2046_adc_priv *priv = iio_priv(indio_dev);
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int ret;
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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ret = tsc2046_adc_read_one(priv, chan->channel, NULL);
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if (ret < 0)
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return ret;
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*val = ret;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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/*
|
|
* Note: the TSC2046 has internal voltage divider on the VBAT
|
|
* line. This divider can be influenced by external divider.
|
|
* So, it is better to use external voltage-divider driver
|
|
* instead, which is calculating complete chain.
|
|
*/
|
|
*val = priv->vref_mv;
|
|
*val2 = chan->scan_type.realbits;
|
|
return IIO_VAL_FRACTIONAL_LOG2;
|
|
}
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
static int tsc2046_adc_update_scan_mode(struct iio_dev *indio_dev,
|
|
const unsigned long *active_scan_mask)
|
|
{
|
|
struct tsc2046_adc_priv *priv = iio_priv(indio_dev);
|
|
unsigned int ch_idx, group = 0;
|
|
size_t size;
|
|
|
|
mutex_lock(&priv->slock);
|
|
|
|
size = 0;
|
|
for_each_set_bit(ch_idx, active_scan_mask, ARRAY_SIZE(priv->l)) {
|
|
size += tsc2046_adc_group_set_layout(priv, group, ch_idx);
|
|
tsc2046_adc_group_set_cmd(priv, group, ch_idx);
|
|
group++;
|
|
}
|
|
|
|
priv->groups = group;
|
|
priv->xfer.len = size;
|
|
priv->time_per_scan_us = size * 8 * priv->time_per_bit_ns / NSEC_PER_USEC;
|
|
|
|
if (priv->scan_interval_us < priv->time_per_scan_us)
|
|
dev_warn(&priv->spi->dev, "The scan interval (%d) is less then calculated scan time (%d)\n",
|
|
priv->scan_interval_us, priv->time_per_scan_us);
|
|
|
|
mutex_unlock(&priv->slock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct iio_info tsc2046_adc_info = {
|
|
.read_raw = tsc2046_adc_read_raw,
|
|
.update_scan_mode = tsc2046_adc_update_scan_mode,
|
|
};
|
|
|
|
static enum hrtimer_restart tsc2046_adc_timer(struct hrtimer *hrtimer)
|
|
{
|
|
struct tsc2046_adc_priv *priv = container_of(hrtimer,
|
|
struct tsc2046_adc_priv,
|
|
trig_timer);
|
|
unsigned long flags;
|
|
|
|
/*
|
|
* This state machine should address following challenges :
|
|
* - the interrupt source is based on level shifter attached to the X
|
|
* channel of ADC. It will change the state every time we switch
|
|
* between channels. So, we need to disable IRQ if we do
|
|
* iio_trigger_poll().
|
|
* - we should do iio_trigger_poll() at some reduced sample rate
|
|
* - we should still trigger for some amount of time after last
|
|
* interrupt with enabled IRQ was processed.
|
|
*/
|
|
|
|
spin_lock_irqsave(&priv->state_lock, flags);
|
|
switch (priv->state) {
|
|
case TSC2046_STATE_ENABLE_IRQ:
|
|
if (priv->poll_cnt < TI_TSC2046_POLL_CNT) {
|
|
priv->poll_cnt++;
|
|
hrtimer_start(&priv->trig_timer,
|
|
ns_to_ktime(priv->scan_interval_us *
|
|
NSEC_PER_USEC),
|
|
HRTIMER_MODE_REL_SOFT);
|
|
|
|
if (priv->poll_cnt >= TI_TSC2046_MIN_POLL_CNT) {
|
|
priv->state = TSC2046_STATE_POLL_IRQ_DISABLE;
|
|
enable_irq(priv->spi->irq);
|
|
} else {
|
|
priv->state = TSC2046_STATE_POLL;
|
|
}
|
|
} else {
|
|
priv->state = TSC2046_STATE_STANDBY;
|
|
enable_irq(priv->spi->irq);
|
|
}
|
|
break;
|
|
case TSC2046_STATE_POLL_IRQ_DISABLE:
|
|
disable_irq_nosync(priv->spi->irq);
|
|
fallthrough;
|
|
case TSC2046_STATE_POLL:
|
|
priv->state = TSC2046_STATE_ENABLE_IRQ;
|
|
/* iio_trigger_poll() starts hrtimer */
|
|
iio_trigger_poll(priv->trig);
|
|
break;
|
|
case TSC2046_STATE_SHUTDOWN:
|
|
break;
|
|
case TSC2046_STATE_STANDBY:
|
|
fallthrough;
|
|
default:
|
|
dev_warn(&priv->spi->dev, "Got unexpected state: %i\n",
|
|
priv->state);
|
|
break;
|
|
}
|
|
spin_unlock_irqrestore(&priv->state_lock, flags);
|
|
|
|
return HRTIMER_NORESTART;
|
|
}
|
|
|
|
static irqreturn_t tsc2046_adc_irq(int irq, void *dev_id)
|
|
{
|
|
struct iio_dev *indio_dev = dev_id;
|
|
struct tsc2046_adc_priv *priv = iio_priv(indio_dev);
|
|
unsigned long flags;
|
|
|
|
hrtimer_try_to_cancel(&priv->trig_timer);
|
|
|
|
spin_lock_irqsave(&priv->state_lock, flags);
|
|
if (priv->state != TSC2046_STATE_SHUTDOWN) {
|
|
priv->state = TSC2046_STATE_ENABLE_IRQ;
|
|
priv->poll_cnt = 0;
|
|
|
|
/* iio_trigger_poll() starts hrtimer */
|
|
disable_irq_nosync(priv->spi->irq);
|
|
iio_trigger_poll(priv->trig);
|
|
}
|
|
spin_unlock_irqrestore(&priv->state_lock, flags);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static void tsc2046_adc_reenable_trigger(struct iio_trigger *trig)
|
|
{
|
|
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
|
|
struct tsc2046_adc_priv *priv = iio_priv(indio_dev);
|
|
ktime_t tim;
|
|
|
|
/*
|
|
* We can sample it as fast as we can, but usually we do not need so
|
|
* many samples. Reduce the sample rate for default (touchscreen) use
|
|
* case.
|
|
*/
|
|
tim = ns_to_ktime((priv->scan_interval_us - priv->time_per_scan_us) *
|
|
NSEC_PER_USEC);
|
|
hrtimer_start(&priv->trig_timer, tim, HRTIMER_MODE_REL_SOFT);
|
|
}
|
|
|
|
static int tsc2046_adc_set_trigger_state(struct iio_trigger *trig, bool enable)
|
|
{
|
|
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
|
|
struct tsc2046_adc_priv *priv = iio_priv(indio_dev);
|
|
unsigned long flags;
|
|
|
|
if (enable) {
|
|
spin_lock_irqsave(&priv->state_lock, flags);
|
|
if (priv->state == TSC2046_STATE_SHUTDOWN) {
|
|
priv->state = TSC2046_STATE_STANDBY;
|
|
enable_irq(priv->spi->irq);
|
|
}
|
|
spin_unlock_irqrestore(&priv->state_lock, flags);
|
|
} else {
|
|
spin_lock_irqsave(&priv->state_lock, flags);
|
|
|
|
if (priv->state == TSC2046_STATE_STANDBY ||
|
|
priv->state == TSC2046_STATE_POLL_IRQ_DISABLE)
|
|
disable_irq_nosync(priv->spi->irq);
|
|
|
|
priv->state = TSC2046_STATE_SHUTDOWN;
|
|
spin_unlock_irqrestore(&priv->state_lock, flags);
|
|
|
|
hrtimer_cancel(&priv->trig_timer);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct iio_trigger_ops tsc2046_adc_trigger_ops = {
|
|
.set_trigger_state = tsc2046_adc_set_trigger_state,
|
|
.reenable = tsc2046_adc_reenable_trigger,
|
|
};
|
|
|
|
static int tsc2046_adc_setup_spi_msg(struct tsc2046_adc_priv *priv)
|
|
{
|
|
unsigned int ch_idx;
|
|
size_t size;
|
|
int ret;
|
|
|
|
/*
|
|
* Make dummy read to set initial power state and get real SPI clock
|
|
* freq. It seems to be not important which channel is used for this
|
|
* case.
|
|
*/
|
|
ret = tsc2046_adc_read_one(priv, TI_TSC2046_ADDR_TEMP0,
|
|
&priv->effective_speed_hz);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/*
|
|
* In case SPI controller do not report effective_speed_hz, use
|
|
* configure value and hope it will match.
|
|
*/
|
|
if (!priv->effective_speed_hz)
|
|
priv->effective_speed_hz = priv->spi->max_speed_hz;
|
|
|
|
|
|
priv->scan_interval_us = TI_TSC2046_SAMPLE_INTERVAL_US;
|
|
priv->time_per_bit_ns = DIV_ROUND_UP(NSEC_PER_SEC,
|
|
priv->effective_speed_hz);
|
|
|
|
/*
|
|
* Calculate and allocate maximal size buffer if all channels are
|
|
* enabled.
|
|
*/
|
|
size = 0;
|
|
for (ch_idx = 0; ch_idx < ARRAY_SIZE(priv->l); ch_idx++)
|
|
size += tsc2046_adc_group_set_layout(priv, ch_idx, ch_idx);
|
|
|
|
if (size > PAGE_SIZE) {
|
|
dev_err(&priv->spi->dev,
|
|
"Calculated scan buffer is too big. Try to reduce spi-max-frequency, settling-time-us or oversampling-ratio\n");
|
|
return -ENOSPC;
|
|
}
|
|
|
|
priv->tx = devm_kzalloc(&priv->spi->dev, size, GFP_KERNEL);
|
|
if (!priv->tx)
|
|
return -ENOMEM;
|
|
|
|
priv->rx = devm_kzalloc(&priv->spi->dev, size, GFP_KERNEL);
|
|
if (!priv->rx)
|
|
return -ENOMEM;
|
|
|
|
priv->xfer.tx_buf = priv->tx;
|
|
priv->xfer.rx_buf = priv->rx;
|
|
priv->xfer.len = size;
|
|
spi_message_init_with_transfers(&priv->msg, &priv->xfer, 1);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void tsc2046_adc_parse_fwnode(struct tsc2046_adc_priv *priv)
|
|
{
|
|
struct fwnode_handle *child;
|
|
struct device *dev = &priv->spi->dev;
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(priv->ch_cfg); i++) {
|
|
priv->ch_cfg[i].settling_time_us = 1;
|
|
priv->ch_cfg[i].oversampling_ratio = 1;
|
|
}
|
|
|
|
device_for_each_child_node(dev, child) {
|
|
u32 stl, overs, reg;
|
|
int ret;
|
|
|
|
ret = fwnode_property_read_u32(child, "reg", ®);
|
|
if (ret) {
|
|
dev_err(dev, "invalid reg on %pfw, err: %pe\n", child,
|
|
ERR_PTR(ret));
|
|
continue;
|
|
}
|
|
|
|
if (reg >= ARRAY_SIZE(priv->ch_cfg)) {
|
|
dev_err(dev, "%pfw: Unsupported reg value: %i, max supported is: %zu.\n",
|
|
child, reg, ARRAY_SIZE(priv->ch_cfg));
|
|
continue;
|
|
}
|
|
|
|
ret = fwnode_property_read_u32(child, "settling-time-us", &stl);
|
|
if (!ret)
|
|
priv->ch_cfg[reg].settling_time_us = stl;
|
|
|
|
ret = fwnode_property_read_u32(child, "oversampling-ratio",
|
|
&overs);
|
|
if (!ret)
|
|
priv->ch_cfg[reg].oversampling_ratio = overs;
|
|
}
|
|
}
|
|
|
|
static void tsc2046_adc_regulator_disable(void *data)
|
|
{
|
|
struct tsc2046_adc_priv *priv = data;
|
|
|
|
regulator_disable(priv->vref_reg);
|
|
}
|
|
|
|
static int tsc2046_adc_configure_regulator(struct tsc2046_adc_priv *priv)
|
|
{
|
|
struct device *dev = &priv->spi->dev;
|
|
int ret;
|
|
|
|
priv->vref_reg = devm_regulator_get_optional(dev, "vref");
|
|
if (IS_ERR(priv->vref_reg)) {
|
|
/* If regulator exists but can't be get, return an error */
|
|
if (PTR_ERR(priv->vref_reg) != -ENODEV)
|
|
return PTR_ERR(priv->vref_reg);
|
|
priv->vref_reg = NULL;
|
|
}
|
|
if (!priv->vref_reg) {
|
|
/* Use internal reference */
|
|
priv->vref_mv = TI_TSC2046_INT_VREF;
|
|
return 0;
|
|
}
|
|
|
|
ret = regulator_enable(priv->vref_reg);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = devm_add_action_or_reset(dev, tsc2046_adc_regulator_disable,
|
|
priv);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = regulator_get_voltage(priv->vref_reg);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
priv->vref_mv = ret / MILLI;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tsc2046_adc_probe(struct spi_device *spi)
|
|
{
|
|
const struct tsc2046_adc_dcfg *dcfg;
|
|
struct device *dev = &spi->dev;
|
|
struct tsc2046_adc_priv *priv;
|
|
struct iio_dev *indio_dev;
|
|
struct iio_trigger *trig;
|
|
int ret;
|
|
|
|
if (spi->max_speed_hz > TI_TSC2046_MAX_CLK_FREQ) {
|
|
dev_err(dev, "SPI max_speed_hz is too high: %d Hz. Max supported freq is %zu Hz\n",
|
|
spi->max_speed_hz, TI_TSC2046_MAX_CLK_FREQ);
|
|
return -EINVAL;
|
|
}
|
|
|
|
dcfg = device_get_match_data(dev);
|
|
if (!dcfg) {
|
|
const struct spi_device_id *id = spi_get_device_id(spi);
|
|
|
|
dcfg = (const struct tsc2046_adc_dcfg *)id->driver_data;
|
|
}
|
|
if (!dcfg)
|
|
return -EINVAL;
|
|
|
|
spi->bits_per_word = 8;
|
|
spi->mode &= ~SPI_MODE_X_MASK;
|
|
spi->mode |= SPI_MODE_0;
|
|
ret = spi_setup(spi);
|
|
if (ret < 0)
|
|
return dev_err_probe(dev, ret, "Error in SPI setup\n");
|
|
|
|
indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
|
|
if (!indio_dev)
|
|
return -ENOMEM;
|
|
|
|
priv = iio_priv(indio_dev);
|
|
priv->dcfg = dcfg;
|
|
|
|
priv->spi = spi;
|
|
|
|
indio_dev->name = TI_TSC2046_NAME;
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
indio_dev->channels = dcfg->channels;
|
|
indio_dev->num_channels = dcfg->num_channels;
|
|
indio_dev->info = &tsc2046_adc_info;
|
|
|
|
ret = tsc2046_adc_configure_regulator(priv);
|
|
if (ret)
|
|
return ret;
|
|
|
|
tsc2046_adc_parse_fwnode(priv);
|
|
|
|
ret = tsc2046_adc_setup_spi_msg(priv);
|
|
if (ret)
|
|
return ret;
|
|
|
|
mutex_init(&priv->slock);
|
|
|
|
ret = devm_request_irq(dev, spi->irq, &tsc2046_adc_irq,
|
|
IRQF_NO_AUTOEN, indio_dev->name, indio_dev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
trig = devm_iio_trigger_alloc(dev, "touchscreen-%s", indio_dev->name);
|
|
if (!trig)
|
|
return -ENOMEM;
|
|
|
|
priv->trig = trig;
|
|
iio_trigger_set_drvdata(trig, indio_dev);
|
|
trig->ops = &tsc2046_adc_trigger_ops;
|
|
|
|
spin_lock_init(&priv->state_lock);
|
|
priv->state = TSC2046_STATE_SHUTDOWN;
|
|
hrtimer_init(&priv->trig_timer, CLOCK_MONOTONIC,
|
|
HRTIMER_MODE_REL_SOFT);
|
|
priv->trig_timer.function = tsc2046_adc_timer;
|
|
|
|
ret = devm_iio_trigger_register(dev, trig);
|
|
if (ret) {
|
|
dev_err(dev, "failed to register trigger\n");
|
|
return ret;
|
|
}
|
|
|
|
ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
|
|
&tsc2046_adc_trigger_handler, NULL);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to setup triggered buffer\n");
|
|
return ret;
|
|
}
|
|
|
|
/* set default trigger */
|
|
indio_dev->trig = iio_trigger_get(priv->trig);
|
|
|
|
return devm_iio_device_register(dev, indio_dev);
|
|
}
|
|
|
|
static const struct of_device_id ads7950_of_table[] = {
|
|
{ .compatible = "ti,tsc2046e-adc", .data = &tsc2046_adc_dcfg_tsc2046e },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ads7950_of_table);
|
|
|
|
static const struct spi_device_id tsc2046_adc_spi_ids[] = {
|
|
{ "tsc2046e-adc", (unsigned long)&tsc2046_adc_dcfg_tsc2046e },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(spi, tsc2046_adc_spi_ids);
|
|
|
|
static struct spi_driver tsc2046_adc_driver = {
|
|
.driver = {
|
|
.name = "tsc2046",
|
|
.of_match_table = ads7950_of_table,
|
|
},
|
|
.id_table = tsc2046_adc_spi_ids,
|
|
.probe = tsc2046_adc_probe,
|
|
};
|
|
module_spi_driver(tsc2046_adc_driver);
|
|
|
|
MODULE_AUTHOR("Oleksij Rempel <kernel@pengutronix.de>");
|
|
MODULE_DESCRIPTION("TI TSC2046 ADC");
|
|
MODULE_LICENSE("GPL v2");
|