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![Kister Genesis Jimenez](/assets/img/avatar_default.png)
Properly sign-extend the rate and temperature data.
Fixes: 2c8920fff1
("iio: gyro: Add driver support for ADXRS290")
Signed-off-by: Kister Genesis Jimenez <kister.jimenez@analog.com>
Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20211115104147.18669-1-nuno.sa@analog.com
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
708 lines
17 KiB
C
708 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* ADXRS290 SPI Gyroscope Driver
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*
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* Copyright (C) 2020 Nishant Malpani <nish.malpani25@gmail.com>
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* Copyright (C) 2020 Analog Devices, Inc.
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*/
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/spi/spi.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/trigger.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#define ADXRS290_ADI_ID 0xAD
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#define ADXRS290_MEMS_ID 0x1D
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#define ADXRS290_DEV_ID 0x92
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#define ADXRS290_REG_ADI_ID 0x00
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#define ADXRS290_REG_MEMS_ID 0x01
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#define ADXRS290_REG_DEV_ID 0x02
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#define ADXRS290_REG_REV_ID 0x03
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#define ADXRS290_REG_SN0 0x04 /* Serial Number Registers, 4 bytes */
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#define ADXRS290_REG_DATAX0 0x08 /* Roll Rate o/p Data Regs, 2 bytes */
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#define ADXRS290_REG_DATAY0 0x0A /* Pitch Rate o/p Data Regs, 2 bytes */
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#define ADXRS290_REG_TEMP0 0x0C
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#define ADXRS290_REG_POWER_CTL 0x10
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#define ADXRS290_REG_FILTER 0x11
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#define ADXRS290_REG_DATA_RDY 0x12
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#define ADXRS290_READ BIT(7)
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#define ADXRS290_TSM BIT(0)
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#define ADXRS290_MEASUREMENT BIT(1)
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#define ADXRS290_DATA_RDY_OUT BIT(0)
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#define ADXRS290_SYNC_MASK GENMASK(1, 0)
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#define ADXRS290_SYNC(x) FIELD_PREP(ADXRS290_SYNC_MASK, x)
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#define ADXRS290_LPF_MASK GENMASK(2, 0)
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#define ADXRS290_LPF(x) FIELD_PREP(ADXRS290_LPF_MASK, x)
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#define ADXRS290_HPF_MASK GENMASK(7, 4)
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#define ADXRS290_HPF(x) FIELD_PREP(ADXRS290_HPF_MASK, x)
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#define ADXRS290_READ_REG(reg) (ADXRS290_READ | (reg))
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#define ADXRS290_MAX_TRANSITION_TIME_MS 100
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enum adxrs290_mode {
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ADXRS290_MODE_STANDBY,
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ADXRS290_MODE_MEASUREMENT,
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};
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enum adxrs290_scan_index {
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ADXRS290_IDX_X,
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ADXRS290_IDX_Y,
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ADXRS290_IDX_TEMP,
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ADXRS290_IDX_TS,
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};
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struct adxrs290_state {
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struct spi_device *spi;
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/* Serialize reads and their subsequent processing */
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struct mutex lock;
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enum adxrs290_mode mode;
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unsigned int lpf_3db_freq_idx;
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unsigned int hpf_3db_freq_idx;
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struct iio_trigger *dready_trig;
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/* Ensure correct alignment of timestamp when present */
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struct {
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s16 channels[3];
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s64 ts __aligned(8);
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} buffer;
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};
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/*
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* Available cut-off frequencies of the low pass filter in Hz.
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* The integer part and fractional part are represented separately.
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*/
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static const int adxrs290_lpf_3db_freq_hz_table[][2] = {
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[0] = {480, 0},
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[1] = {320, 0},
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[2] = {160, 0},
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[3] = {80, 0},
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[4] = {56, 600000},
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[5] = {40, 0},
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[6] = {28, 300000},
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[7] = {20, 0},
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};
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/*
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* Available cut-off frequencies of the high pass filter in Hz.
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* The integer part and fractional part are represented separately.
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*/
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static const int adxrs290_hpf_3db_freq_hz_table[][2] = {
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[0] = {0, 0},
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[1] = {0, 11000},
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[2] = {0, 22000},
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[3] = {0, 44000},
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[4] = {0, 87000},
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[5] = {0, 175000},
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[6] = {0, 350000},
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[7] = {0, 700000},
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[8] = {1, 400000},
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[9] = {2, 800000},
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[10] = {11, 300000},
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};
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static int adxrs290_get_rate_data(struct iio_dev *indio_dev, const u8 cmd, int *val)
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{
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struct adxrs290_state *st = iio_priv(indio_dev);
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int ret = 0;
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int temp;
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mutex_lock(&st->lock);
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temp = spi_w8r16(st->spi, cmd);
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if (temp < 0) {
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ret = temp;
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goto err_unlock;
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}
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*val = sign_extend32(temp, 15);
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err_unlock:
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mutex_unlock(&st->lock);
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return ret;
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}
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static int adxrs290_get_temp_data(struct iio_dev *indio_dev, int *val)
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{
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const u8 cmd = ADXRS290_READ_REG(ADXRS290_REG_TEMP0);
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struct adxrs290_state *st = iio_priv(indio_dev);
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int ret = 0;
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int temp;
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mutex_lock(&st->lock);
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temp = spi_w8r16(st->spi, cmd);
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if (temp < 0) {
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ret = temp;
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goto err_unlock;
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}
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/* extract lower 12 bits temperature reading */
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*val = sign_extend32(temp, 11);
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err_unlock:
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mutex_unlock(&st->lock);
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return ret;
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}
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static int adxrs290_get_3db_freq(struct iio_dev *indio_dev, u8 *val, u8 *val2)
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{
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const u8 cmd = ADXRS290_READ_REG(ADXRS290_REG_FILTER);
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struct adxrs290_state *st = iio_priv(indio_dev);
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int ret = 0;
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short temp;
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mutex_lock(&st->lock);
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temp = spi_w8r8(st->spi, cmd);
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if (temp < 0) {
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ret = temp;
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goto err_unlock;
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}
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*val = FIELD_GET(ADXRS290_LPF_MASK, temp);
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*val2 = FIELD_GET(ADXRS290_HPF_MASK, temp);
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err_unlock:
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mutex_unlock(&st->lock);
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return ret;
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}
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static int adxrs290_spi_write_reg(struct spi_device *spi, const u8 reg,
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const u8 val)
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{
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u8 buf[2];
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buf[0] = reg;
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buf[1] = val;
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return spi_write_then_read(spi, buf, ARRAY_SIZE(buf), NULL, 0);
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}
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static int adxrs290_find_match(const int (*freq_tbl)[2], const int n,
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const int val, const int val2)
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{
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int i;
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for (i = 0; i < n; i++) {
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if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2)
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return i;
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}
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return -EINVAL;
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}
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static int adxrs290_set_filter_freq(struct iio_dev *indio_dev,
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const unsigned int lpf_idx,
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const unsigned int hpf_idx)
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{
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struct adxrs290_state *st = iio_priv(indio_dev);
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u8 val;
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val = ADXRS290_HPF(hpf_idx) | ADXRS290_LPF(lpf_idx);
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return adxrs290_spi_write_reg(st->spi, ADXRS290_REG_FILTER, val);
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}
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static int adxrs290_set_mode(struct iio_dev *indio_dev, enum adxrs290_mode mode)
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{
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struct adxrs290_state *st = iio_priv(indio_dev);
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int val, ret;
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if (st->mode == mode)
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return 0;
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mutex_lock(&st->lock);
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ret = spi_w8r8(st->spi, ADXRS290_READ_REG(ADXRS290_REG_POWER_CTL));
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if (ret < 0)
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goto out_unlock;
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val = ret;
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switch (mode) {
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case ADXRS290_MODE_STANDBY:
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val &= ~ADXRS290_MEASUREMENT;
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break;
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case ADXRS290_MODE_MEASUREMENT:
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val |= ADXRS290_MEASUREMENT;
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break;
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default:
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ret = -EINVAL;
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goto out_unlock;
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}
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ret = adxrs290_spi_write_reg(st->spi, ADXRS290_REG_POWER_CTL, val);
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if (ret < 0) {
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dev_err(&st->spi->dev, "unable to set mode: %d\n", ret);
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goto out_unlock;
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}
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/* update cached mode */
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st->mode = mode;
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out_unlock:
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mutex_unlock(&st->lock);
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return ret;
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}
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static void adxrs290_chip_off_action(void *data)
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{
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struct iio_dev *indio_dev = data;
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adxrs290_set_mode(indio_dev, ADXRS290_MODE_STANDBY);
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}
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static int adxrs290_initial_setup(struct iio_dev *indio_dev)
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{
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struct adxrs290_state *st = iio_priv(indio_dev);
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struct spi_device *spi = st->spi;
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int ret;
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ret = adxrs290_spi_write_reg(spi, ADXRS290_REG_POWER_CTL,
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ADXRS290_MEASUREMENT | ADXRS290_TSM);
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if (ret < 0)
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return ret;
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st->mode = ADXRS290_MODE_MEASUREMENT;
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return devm_add_action_or_reset(&spi->dev, adxrs290_chip_off_action,
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indio_dev);
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}
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static int adxrs290_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val,
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int *val2,
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long mask)
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{
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struct adxrs290_state *st = iio_priv(indio_dev);
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unsigned int t;
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret)
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return ret;
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switch (chan->type) {
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case IIO_ANGL_VEL:
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ret = adxrs290_get_rate_data(indio_dev,
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ADXRS290_READ_REG(chan->address),
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val);
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if (ret < 0)
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break;
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ret = IIO_VAL_INT;
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break;
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case IIO_TEMP:
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ret = adxrs290_get_temp_data(indio_dev, val);
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if (ret < 0)
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break;
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ret = IIO_VAL_INT;
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break;
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default:
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ret = -EINVAL;
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break;
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}
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iio_device_release_direct_mode(indio_dev);
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return ret;
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case IIO_CHAN_INFO_SCALE:
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switch (chan->type) {
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case IIO_ANGL_VEL:
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/* 1 LSB = 0.005 degrees/sec */
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*val = 0;
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*val2 = 87266;
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return IIO_VAL_INT_PLUS_NANO;
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case IIO_TEMP:
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/* 1 LSB = 0.1 degrees Celsius */
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*val = 100;
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
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switch (chan->type) {
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case IIO_ANGL_VEL:
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t = st->lpf_3db_freq_idx;
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*val = adxrs290_lpf_3db_freq_hz_table[t][0];
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*val2 = adxrs290_lpf_3db_freq_hz_table[t][1];
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return IIO_VAL_INT_PLUS_MICRO;
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default:
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return -EINVAL;
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}
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case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
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switch (chan->type) {
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case IIO_ANGL_VEL:
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t = st->hpf_3db_freq_idx;
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*val = adxrs290_hpf_3db_freq_hz_table[t][0];
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*val2 = adxrs290_hpf_3db_freq_hz_table[t][1];
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return IIO_VAL_INT_PLUS_MICRO;
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default:
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return -EINVAL;
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}
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}
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return -EINVAL;
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}
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static int adxrs290_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val,
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int val2,
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long mask)
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{
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struct adxrs290_state *st = iio_priv(indio_dev);
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int ret, lpf_idx, hpf_idx;
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret)
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return ret;
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switch (mask) {
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case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
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lpf_idx = adxrs290_find_match(adxrs290_lpf_3db_freq_hz_table,
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ARRAY_SIZE(adxrs290_lpf_3db_freq_hz_table),
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val, val2);
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if (lpf_idx < 0) {
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ret = -EINVAL;
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break;
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}
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/* caching the updated state of the low-pass filter */
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st->lpf_3db_freq_idx = lpf_idx;
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/* retrieving the current state of the high-pass filter */
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hpf_idx = st->hpf_3db_freq_idx;
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ret = adxrs290_set_filter_freq(indio_dev, lpf_idx, hpf_idx);
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break;
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case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
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hpf_idx = adxrs290_find_match(adxrs290_hpf_3db_freq_hz_table,
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ARRAY_SIZE(adxrs290_hpf_3db_freq_hz_table),
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val, val2);
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if (hpf_idx < 0) {
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ret = -EINVAL;
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break;
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}
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/* caching the updated state of the high-pass filter */
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st->hpf_3db_freq_idx = hpf_idx;
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/* retrieving the current state of the low-pass filter */
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lpf_idx = st->lpf_3db_freq_idx;
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ret = adxrs290_set_filter_freq(indio_dev, lpf_idx, hpf_idx);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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iio_device_release_direct_mode(indio_dev);
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return ret;
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}
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static int adxrs290_read_avail(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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const int **vals, int *type, int *length,
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long mask)
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{
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switch (mask) {
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case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
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*vals = (const int *)adxrs290_lpf_3db_freq_hz_table;
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*type = IIO_VAL_INT_PLUS_MICRO;
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/* Values are stored in a 2D matrix */
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*length = ARRAY_SIZE(adxrs290_lpf_3db_freq_hz_table) * 2;
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return IIO_AVAIL_LIST;
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case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
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*vals = (const int *)adxrs290_hpf_3db_freq_hz_table;
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*type = IIO_VAL_INT_PLUS_MICRO;
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/* Values are stored in a 2D matrix */
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*length = ARRAY_SIZE(adxrs290_hpf_3db_freq_hz_table) * 2;
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return IIO_AVAIL_LIST;
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default:
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return -EINVAL;
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}
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}
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static int adxrs290_reg_access_rw(struct spi_device *spi, unsigned int reg,
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unsigned int *readval)
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{
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int ret;
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ret = spi_w8r8(spi, ADXRS290_READ_REG(reg));
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if (ret < 0)
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return ret;
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*readval = ret;
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return 0;
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}
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static int adxrs290_reg_access(struct iio_dev *indio_dev, unsigned int reg,
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unsigned int writeval, unsigned int *readval)
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{
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struct adxrs290_state *st = iio_priv(indio_dev);
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if (readval)
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return adxrs290_reg_access_rw(st->spi, reg, readval);
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else
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return adxrs290_spi_write_reg(st->spi, reg, writeval);
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}
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static int adxrs290_data_rdy_trigger_set_state(struct iio_trigger *trig,
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bool state)
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{
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struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
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struct adxrs290_state *st = iio_priv(indio_dev);
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int ret;
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u8 val;
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val = state ? ADXRS290_SYNC(ADXRS290_DATA_RDY_OUT) : 0;
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ret = adxrs290_spi_write_reg(st->spi, ADXRS290_REG_DATA_RDY, val);
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if (ret < 0)
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dev_err(&st->spi->dev, "failed to start data rdy interrupt\n");
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return ret;
|
|
}
|
|
|
|
static void adxrs290_reset_trig(struct iio_trigger *trig)
|
|
{
|
|
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
|
|
int val;
|
|
|
|
/*
|
|
* Data ready interrupt is reset after a read of the data registers.
|
|
* Here, we only read the 16b DATAY registers as that marks the end of
|
|
* a read of the data registers and initiates a reset for the interrupt
|
|
* line.
|
|
*/
|
|
adxrs290_get_rate_data(indio_dev,
|
|
ADXRS290_READ_REG(ADXRS290_REG_DATAY0), &val);
|
|
}
|
|
|
|
static const struct iio_trigger_ops adxrs290_trigger_ops = {
|
|
.set_trigger_state = &adxrs290_data_rdy_trigger_set_state,
|
|
.validate_device = &iio_trigger_validate_own_device,
|
|
.reenable = &adxrs290_reset_trig,
|
|
};
|
|
|
|
static irqreturn_t adxrs290_trigger_handler(int irq, void *p)
|
|
{
|
|
struct iio_poll_func *pf = p;
|
|
struct iio_dev *indio_dev = pf->indio_dev;
|
|
struct adxrs290_state *st = iio_priv(indio_dev);
|
|
u8 tx = ADXRS290_READ_REG(ADXRS290_REG_DATAX0);
|
|
int ret;
|
|
|
|
mutex_lock(&st->lock);
|
|
|
|
/* exercise a bulk data capture starting from reg DATAX0... */
|
|
ret = spi_write_then_read(st->spi, &tx, sizeof(tx), st->buffer.channels,
|
|
sizeof(st->buffer.channels));
|
|
if (ret < 0)
|
|
goto out_unlock_notify;
|
|
|
|
iio_push_to_buffers_with_timestamp(indio_dev, &st->buffer,
|
|
pf->timestamp);
|
|
|
|
out_unlock_notify:
|
|
mutex_unlock(&st->lock);
|
|
iio_trigger_notify_done(indio_dev->trig);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
#define ADXRS290_ANGL_VEL_CHANNEL(reg, axis) { \
|
|
.type = IIO_ANGL_VEL, \
|
|
.address = reg, \
|
|
.modified = 1, \
|
|
.channel2 = IIO_MOD_##axis, \
|
|
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
|
|
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
|
|
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
|
|
BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
|
|
.info_mask_shared_by_type_available = \
|
|
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
|
|
BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
|
|
.scan_index = ADXRS290_IDX_##axis, \
|
|
.scan_type = { \
|
|
.sign = 's', \
|
|
.realbits = 16, \
|
|
.storagebits = 16, \
|
|
.endianness = IIO_LE, \
|
|
}, \
|
|
}
|
|
|
|
static const struct iio_chan_spec adxrs290_channels[] = {
|
|
ADXRS290_ANGL_VEL_CHANNEL(ADXRS290_REG_DATAX0, X),
|
|
ADXRS290_ANGL_VEL_CHANNEL(ADXRS290_REG_DATAY0, Y),
|
|
{
|
|
.type = IIO_TEMP,
|
|
.address = ADXRS290_REG_TEMP0,
|
|
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
|
|
BIT(IIO_CHAN_INFO_SCALE),
|
|
.scan_index = ADXRS290_IDX_TEMP,
|
|
.scan_type = {
|
|
.sign = 's',
|
|
.realbits = 12,
|
|
.storagebits = 16,
|
|
.endianness = IIO_LE,
|
|
},
|
|
},
|
|
IIO_CHAN_SOFT_TIMESTAMP(ADXRS290_IDX_TS),
|
|
};
|
|
|
|
static const unsigned long adxrs290_avail_scan_masks[] = {
|
|
BIT(ADXRS290_IDX_X) | BIT(ADXRS290_IDX_Y) | BIT(ADXRS290_IDX_TEMP),
|
|
0
|
|
};
|
|
|
|
static const struct iio_info adxrs290_info = {
|
|
.read_raw = &adxrs290_read_raw,
|
|
.write_raw = &adxrs290_write_raw,
|
|
.read_avail = &adxrs290_read_avail,
|
|
.debugfs_reg_access = &adxrs290_reg_access,
|
|
};
|
|
|
|
static int adxrs290_probe_trigger(struct iio_dev *indio_dev)
|
|
{
|
|
struct adxrs290_state *st = iio_priv(indio_dev);
|
|
int ret;
|
|
|
|
if (!st->spi->irq) {
|
|
dev_info(&st->spi->dev, "no irq, using polling\n");
|
|
return 0;
|
|
}
|
|
|
|
st->dready_trig = devm_iio_trigger_alloc(&st->spi->dev, "%s-dev%d",
|
|
indio_dev->name,
|
|
iio_device_id(indio_dev));
|
|
if (!st->dready_trig)
|
|
return -ENOMEM;
|
|
|
|
st->dready_trig->ops = &adxrs290_trigger_ops;
|
|
iio_trigger_set_drvdata(st->dready_trig, indio_dev);
|
|
|
|
ret = devm_request_irq(&st->spi->dev, st->spi->irq,
|
|
&iio_trigger_generic_data_rdy_poll,
|
|
IRQF_ONESHOT, "adxrs290_irq", st->dready_trig);
|
|
if (ret < 0)
|
|
return dev_err_probe(&st->spi->dev, ret,
|
|
"request irq %d failed\n", st->spi->irq);
|
|
|
|
ret = devm_iio_trigger_register(&st->spi->dev, st->dready_trig);
|
|
if (ret) {
|
|
dev_err(&st->spi->dev, "iio trigger register failed\n");
|
|
return ret;
|
|
}
|
|
|
|
indio_dev->trig = iio_trigger_get(st->dready_trig);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int adxrs290_probe(struct spi_device *spi)
|
|
{
|
|
struct iio_dev *indio_dev;
|
|
struct adxrs290_state *st;
|
|
u8 val, val2;
|
|
int ret;
|
|
|
|
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
|
|
if (!indio_dev)
|
|
return -ENOMEM;
|
|
|
|
st = iio_priv(indio_dev);
|
|
st->spi = spi;
|
|
|
|
indio_dev->name = "adxrs290";
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
indio_dev->channels = adxrs290_channels;
|
|
indio_dev->num_channels = ARRAY_SIZE(adxrs290_channels);
|
|
indio_dev->info = &adxrs290_info;
|
|
indio_dev->available_scan_masks = adxrs290_avail_scan_masks;
|
|
|
|
mutex_init(&st->lock);
|
|
|
|
val = spi_w8r8(spi, ADXRS290_READ_REG(ADXRS290_REG_ADI_ID));
|
|
if (val != ADXRS290_ADI_ID) {
|
|
dev_err(&spi->dev, "Wrong ADI ID 0x%02x\n", val);
|
|
return -ENODEV;
|
|
}
|
|
|
|
val = spi_w8r8(spi, ADXRS290_READ_REG(ADXRS290_REG_MEMS_ID));
|
|
if (val != ADXRS290_MEMS_ID) {
|
|
dev_err(&spi->dev, "Wrong MEMS ID 0x%02x\n", val);
|
|
return -ENODEV;
|
|
}
|
|
|
|
val = spi_w8r8(spi, ADXRS290_READ_REG(ADXRS290_REG_DEV_ID));
|
|
if (val != ADXRS290_DEV_ID) {
|
|
dev_err(&spi->dev, "Wrong DEV ID 0x%02x\n", val);
|
|
return -ENODEV;
|
|
}
|
|
|
|
/* default mode the gyroscope starts in */
|
|
st->mode = ADXRS290_MODE_STANDBY;
|
|
|
|
/* switch to measurement mode and switch on the temperature sensor */
|
|
ret = adxrs290_initial_setup(indio_dev);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* max transition time to measurement mode */
|
|
msleep(ADXRS290_MAX_TRANSITION_TIME_MS);
|
|
|
|
ret = adxrs290_get_3db_freq(indio_dev, &val, &val2);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
st->lpf_3db_freq_idx = val;
|
|
st->hpf_3db_freq_idx = val2;
|
|
|
|
ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
|
|
&iio_pollfunc_store_time,
|
|
&adxrs290_trigger_handler, NULL);
|
|
if (ret < 0)
|
|
return dev_err_probe(&spi->dev, ret,
|
|
"iio triggered buffer setup failed\n");
|
|
|
|
ret = adxrs290_probe_trigger(indio_dev);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return devm_iio_device_register(&spi->dev, indio_dev);
|
|
}
|
|
|
|
static const struct of_device_id adxrs290_of_match[] = {
|
|
{ .compatible = "adi,adxrs290" },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, adxrs290_of_match);
|
|
|
|
static struct spi_driver adxrs290_driver = {
|
|
.driver = {
|
|
.name = "adxrs290",
|
|
.of_match_table = adxrs290_of_match,
|
|
},
|
|
.probe = adxrs290_probe,
|
|
};
|
|
module_spi_driver(adxrs290_driver);
|
|
|
|
MODULE_AUTHOR("Nishant Malpani <nish.malpani25@gmail.com>");
|
|
MODULE_DESCRIPTION("Analog Devices ADXRS290 Gyroscope SPI driver");
|
|
MODULE_LICENSE("GPL");
|