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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-24 09:50:04 +00:00
![Uwe Kleine-König](/assets/img/avatar_default.png)
After commitb8a1a4cd5a
("i2c: Provide a temporary .probe_new() call-back type"), all drivers being converted to .probe_new() and then03c835f498
("i2c: Switch .probe() to not take an id parameter") convert back to (the new) .probe() to be able to eventually drop .probe_new() from struct i2c_driver. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230515205048.19561-1-u.kleine-koenig@pengutronix.de Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
847 lines
19 KiB
C
847 lines
19 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* adux1020.c - Support for Analog Devices ADUX1020 photometric sensor
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*
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* Copyright (C) 2019 Linaro Ltd.
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* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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*
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* TODO: Triggered buffer support
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*/
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#include <linux/bitfield.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/regmap.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/events.h>
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#define ADUX1020_REGMAP_NAME "adux1020_regmap"
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#define ADUX1020_DRV_NAME "adux1020"
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/* System registers */
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#define ADUX1020_REG_CHIP_ID 0x08
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#define ADUX1020_REG_SLAVE_ADDRESS 0x09
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#define ADUX1020_REG_SW_RESET 0x0f
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#define ADUX1020_REG_INT_ENABLE 0x1c
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#define ADUX1020_REG_INT_POLARITY 0x1d
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#define ADUX1020_REG_PROX_TH_ON1 0x2a
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#define ADUX1020_REG_PROX_TH_OFF1 0x2b
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#define ADUX1020_REG_PROX_TYPE 0x2f
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#define ADUX1020_REG_TEST_MODES_3 0x32
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#define ADUX1020_REG_FORCE_MODE 0x33
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#define ADUX1020_REG_FREQUENCY 0x40
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#define ADUX1020_REG_LED_CURRENT 0x41
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#define ADUX1020_REG_OP_MODE 0x45
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#define ADUX1020_REG_INT_MASK 0x48
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#define ADUX1020_REG_INT_STATUS 0x49
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#define ADUX1020_REG_DATA_BUFFER 0x60
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/* Chip ID bits */
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#define ADUX1020_CHIP_ID_MASK GENMASK(11, 0)
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#define ADUX1020_CHIP_ID 0x03fc
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#define ADUX1020_SW_RESET BIT(1)
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#define ADUX1020_FIFO_FLUSH BIT(15)
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#define ADUX1020_OP_MODE_MASK GENMASK(3, 0)
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#define ADUX1020_DATA_OUT_MODE_MASK GENMASK(7, 4)
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#define ADUX1020_DATA_OUT_PROX_I FIELD_PREP(ADUX1020_DATA_OUT_MODE_MASK, 1)
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#define ADUX1020_MODE_INT_MASK GENMASK(7, 0)
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#define ADUX1020_INT_ENABLE 0x2094
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#define ADUX1020_INT_DISABLE 0x2090
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#define ADUX1020_PROX_INT_ENABLE 0x00f0
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#define ADUX1020_PROX_ON1_INT BIT(0)
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#define ADUX1020_PROX_OFF1_INT BIT(1)
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#define ADUX1020_FIFO_INT_ENABLE 0x7f
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#define ADUX1020_MODE_INT_DISABLE 0xff
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#define ADUX1020_MODE_INT_STATUS_MASK GENMASK(7, 0)
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#define ADUX1020_FIFO_STATUS_MASK GENMASK(15, 8)
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#define ADUX1020_INT_CLEAR 0xff
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#define ADUX1020_PROX_TYPE BIT(15)
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#define ADUX1020_INT_PROX_ON1 BIT(0)
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#define ADUX1020_INT_PROX_OFF1 BIT(1)
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#define ADUX1020_FORCE_CLOCK_ON 0x0f4f
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#define ADUX1020_FORCE_CLOCK_RESET 0x0040
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#define ADUX1020_ACTIVE_4_STATE 0x0008
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#define ADUX1020_PROX_FREQ_MASK GENMASK(7, 4)
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#define ADUX1020_PROX_FREQ(x) FIELD_PREP(ADUX1020_PROX_FREQ_MASK, x)
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#define ADUX1020_LED_CURRENT_MASK GENMASK(3, 0)
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#define ADUX1020_LED_PIREF_EN BIT(12)
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/* Operating modes */
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enum adux1020_op_modes {
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ADUX1020_MODE_STANDBY,
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ADUX1020_MODE_PROX_I,
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ADUX1020_MODE_PROX_XY,
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ADUX1020_MODE_GEST,
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ADUX1020_MODE_SAMPLE,
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ADUX1020_MODE_FORCE = 0x0e,
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ADUX1020_MODE_IDLE = 0x0f,
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};
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struct adux1020_data {
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struct i2c_client *client;
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struct iio_dev *indio_dev;
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struct mutex lock;
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struct regmap *regmap;
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};
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struct adux1020_mode_data {
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u8 bytes;
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u8 buf_len;
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u16 int_en;
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};
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static const struct adux1020_mode_data adux1020_modes[] = {
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[ADUX1020_MODE_PROX_I] = {
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.bytes = 2,
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.buf_len = 1,
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.int_en = ADUX1020_PROX_INT_ENABLE,
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},
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};
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static const struct regmap_config adux1020_regmap_config = {
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.name = ADUX1020_REGMAP_NAME,
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.reg_bits = 8,
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.val_bits = 16,
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.max_register = 0x6F,
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.cache_type = REGCACHE_NONE,
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};
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static const struct reg_sequence adux1020_def_conf[] = {
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{ 0x000c, 0x000f },
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{ 0x0010, 0x1010 },
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{ 0x0011, 0x004c },
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{ 0x0012, 0x5f0c },
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{ 0x0013, 0xada5 },
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{ 0x0014, 0x0080 },
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{ 0x0015, 0x0000 },
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{ 0x0016, 0x0600 },
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{ 0x0017, 0x0000 },
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{ 0x0018, 0x2693 },
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{ 0x0019, 0x0004 },
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{ 0x001a, 0x4280 },
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{ 0x001b, 0x0060 },
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{ 0x001c, 0x2094 },
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{ 0x001d, 0x0020 },
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{ 0x001e, 0x0001 },
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{ 0x001f, 0x0100 },
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{ 0x0020, 0x0320 },
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{ 0x0021, 0x0A13 },
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{ 0x0022, 0x0320 },
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{ 0x0023, 0x0113 },
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{ 0x0024, 0x0000 },
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{ 0x0025, 0x2412 },
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{ 0x0026, 0x2412 },
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{ 0x0027, 0x0022 },
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{ 0x0028, 0x0000 },
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{ 0x0029, 0x0300 },
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{ 0x002a, 0x0700 },
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{ 0x002b, 0x0600 },
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{ 0x002c, 0x6000 },
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{ 0x002d, 0x4000 },
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{ 0x002e, 0x0000 },
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{ 0x002f, 0x0000 },
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{ 0x0030, 0x0000 },
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{ 0x0031, 0x0000 },
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{ 0x0032, 0x0040 },
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{ 0x0033, 0x0008 },
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{ 0x0034, 0xE400 },
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{ 0x0038, 0x8080 },
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{ 0x0039, 0x8080 },
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{ 0x003a, 0x2000 },
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{ 0x003b, 0x1f00 },
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{ 0x003c, 0x2000 },
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{ 0x003d, 0x2000 },
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{ 0x003e, 0x0000 },
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{ 0x0040, 0x8069 },
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{ 0x0041, 0x1f2f },
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{ 0x0042, 0x4000 },
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{ 0x0043, 0x0000 },
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{ 0x0044, 0x0008 },
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{ 0x0046, 0x0000 },
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{ 0x0048, 0x00ef },
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{ 0x0049, 0x0000 },
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{ 0x0045, 0x0000 },
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};
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static const int adux1020_rates[][2] = {
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{ 0, 100000 },
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{ 0, 200000 },
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{ 0, 500000 },
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{ 1, 0 },
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{ 2, 0 },
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{ 5, 0 },
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{ 10, 0 },
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{ 20, 0 },
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{ 50, 0 },
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{ 100, 0 },
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{ 190, 0 },
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{ 450, 0 },
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{ 820, 0 },
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{ 1400, 0 },
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};
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static const int adux1020_led_currents[][2] = {
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{ 0, 25000 },
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{ 0, 40000 },
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{ 0, 55000 },
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{ 0, 70000 },
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{ 0, 85000 },
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{ 0, 100000 },
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{ 0, 115000 },
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{ 0, 130000 },
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{ 0, 145000 },
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{ 0, 160000 },
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{ 0, 175000 },
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{ 0, 190000 },
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{ 0, 205000 },
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{ 0, 220000 },
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{ 0, 235000 },
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{ 0, 250000 },
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};
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static int adux1020_flush_fifo(struct adux1020_data *data)
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{
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int ret;
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/* Force Idle mode */
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ret = regmap_write(data->regmap, ADUX1020_REG_FORCE_MODE,
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ADUX1020_ACTIVE_4_STATE);
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if (ret < 0)
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return ret;
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ret = regmap_update_bits(data->regmap, ADUX1020_REG_OP_MODE,
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ADUX1020_OP_MODE_MASK, ADUX1020_MODE_FORCE);
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if (ret < 0)
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return ret;
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ret = regmap_update_bits(data->regmap, ADUX1020_REG_OP_MODE,
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ADUX1020_OP_MODE_MASK, ADUX1020_MODE_IDLE);
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if (ret < 0)
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return ret;
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/* Flush FIFO */
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ret = regmap_write(data->regmap, ADUX1020_REG_TEST_MODES_3,
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ADUX1020_FORCE_CLOCK_ON);
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if (ret < 0)
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return ret;
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ret = regmap_write(data->regmap, ADUX1020_REG_INT_STATUS,
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ADUX1020_FIFO_FLUSH);
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if (ret < 0)
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return ret;
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return regmap_write(data->regmap, ADUX1020_REG_TEST_MODES_3,
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ADUX1020_FORCE_CLOCK_RESET);
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}
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static int adux1020_read_fifo(struct adux1020_data *data, u16 *buf, u8 buf_len)
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{
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unsigned int regval;
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int i, ret;
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/* Enable 32MHz clock */
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ret = regmap_write(data->regmap, ADUX1020_REG_TEST_MODES_3,
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ADUX1020_FORCE_CLOCK_ON);
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if (ret < 0)
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return ret;
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for (i = 0; i < buf_len; i++) {
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ret = regmap_read(data->regmap, ADUX1020_REG_DATA_BUFFER,
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®val);
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if (ret < 0)
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return ret;
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buf[i] = regval;
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}
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/* Set 32MHz clock to be controlled by internal state machine */
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return regmap_write(data->regmap, ADUX1020_REG_TEST_MODES_3,
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ADUX1020_FORCE_CLOCK_RESET);
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}
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static int adux1020_set_mode(struct adux1020_data *data,
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enum adux1020_op_modes mode)
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{
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int ret;
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/* Switch to standby mode before changing the mode */
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ret = regmap_write(data->regmap, ADUX1020_REG_OP_MODE,
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ADUX1020_MODE_STANDBY);
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if (ret < 0)
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return ret;
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/* Set data out and switch to the desired mode */
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switch (mode) {
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case ADUX1020_MODE_PROX_I:
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ret = regmap_update_bits(data->regmap, ADUX1020_REG_OP_MODE,
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ADUX1020_DATA_OUT_MODE_MASK,
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ADUX1020_DATA_OUT_PROX_I);
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if (ret < 0)
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return ret;
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ret = regmap_update_bits(data->regmap, ADUX1020_REG_OP_MODE,
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ADUX1020_OP_MODE_MASK,
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ADUX1020_MODE_PROX_I);
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if (ret < 0)
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return ret;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int adux1020_measure(struct adux1020_data *data,
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enum adux1020_op_modes mode,
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u16 *val)
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{
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unsigned int status;
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int ret, tries = 50;
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/* Disable INT pin as polling is going to be used */
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ret = regmap_write(data->regmap, ADUX1020_REG_INT_ENABLE,
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ADUX1020_INT_DISABLE);
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if (ret < 0)
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return ret;
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/* Enable mode interrupt */
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ret = regmap_update_bits(data->regmap, ADUX1020_REG_INT_MASK,
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ADUX1020_MODE_INT_MASK,
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adux1020_modes[mode].int_en);
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if (ret < 0)
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return ret;
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while (tries--) {
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ret = regmap_read(data->regmap, ADUX1020_REG_INT_STATUS,
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&status);
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if (ret < 0)
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return ret;
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status &= ADUX1020_FIFO_STATUS_MASK;
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if (status >= adux1020_modes[mode].bytes)
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break;
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msleep(20);
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}
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if (tries < 0)
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return -EIO;
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ret = adux1020_read_fifo(data, val, adux1020_modes[mode].buf_len);
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if (ret < 0)
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return ret;
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/* Clear mode interrupt */
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ret = regmap_write(data->regmap, ADUX1020_REG_INT_STATUS,
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(~adux1020_modes[mode].int_en));
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if (ret < 0)
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return ret;
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/* Disable mode interrupts */
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return regmap_update_bits(data->regmap, ADUX1020_REG_INT_MASK,
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ADUX1020_MODE_INT_MASK,
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ADUX1020_MODE_INT_DISABLE);
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}
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static int adux1020_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct adux1020_data *data = iio_priv(indio_dev);
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u16 buf[3];
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int ret = -EINVAL;
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unsigned int regval;
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mutex_lock(&data->lock);
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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switch (chan->type) {
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case IIO_PROXIMITY:
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ret = adux1020_set_mode(data, ADUX1020_MODE_PROX_I);
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if (ret < 0)
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goto fail;
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ret = adux1020_measure(data, ADUX1020_MODE_PROX_I, buf);
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if (ret < 0)
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goto fail;
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*val = buf[0];
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ret = IIO_VAL_INT;
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break;
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default:
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break;
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}
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break;
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case IIO_CHAN_INFO_PROCESSED:
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switch (chan->type) {
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case IIO_CURRENT:
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ret = regmap_read(data->regmap,
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ADUX1020_REG_LED_CURRENT, ®val);
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if (ret < 0)
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goto fail;
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regval = regval & ADUX1020_LED_CURRENT_MASK;
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*val = adux1020_led_currents[regval][0];
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*val2 = adux1020_led_currents[regval][1];
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ret = IIO_VAL_INT_PLUS_MICRO;
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break;
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default:
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break;
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}
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break;
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case IIO_CHAN_INFO_SAMP_FREQ:
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switch (chan->type) {
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case IIO_PROXIMITY:
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ret = regmap_read(data->regmap, ADUX1020_REG_FREQUENCY,
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®val);
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if (ret < 0)
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goto fail;
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regval = FIELD_GET(ADUX1020_PROX_FREQ_MASK, regval);
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*val = adux1020_rates[regval][0];
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*val2 = adux1020_rates[regval][1];
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ret = IIO_VAL_INT_PLUS_MICRO;
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break;
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default:
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break;
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}
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break;
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default:
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break;
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}
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fail:
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mutex_unlock(&data->lock);
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return ret;
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};
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static inline int adux1020_find_index(const int array[][2], int count, int val,
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int val2)
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{
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int i;
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for (i = 0; i < count; i++)
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if (val == array[i][0] && val2 == array[i][1])
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return i;
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return -EINVAL;
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}
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static int adux1020_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct adux1020_data *data = iio_priv(indio_dev);
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int i, ret = -EINVAL;
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mutex_lock(&data->lock);
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switch (mask) {
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case IIO_CHAN_INFO_SAMP_FREQ:
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if (chan->type == IIO_PROXIMITY) {
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i = adux1020_find_index(adux1020_rates,
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ARRAY_SIZE(adux1020_rates),
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val, val2);
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if (i < 0) {
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ret = i;
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goto fail;
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}
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ret = regmap_update_bits(data->regmap,
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ADUX1020_REG_FREQUENCY,
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ADUX1020_PROX_FREQ_MASK,
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ADUX1020_PROX_FREQ(i));
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}
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break;
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case IIO_CHAN_INFO_PROCESSED:
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if (chan->type == IIO_CURRENT) {
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i = adux1020_find_index(adux1020_led_currents,
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ARRAY_SIZE(adux1020_led_currents),
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val, val2);
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if (i < 0) {
|
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ret = i;
|
|
goto fail;
|
|
}
|
|
|
|
ret = regmap_update_bits(data->regmap,
|
|
ADUX1020_REG_LED_CURRENT,
|
|
ADUX1020_LED_CURRENT_MASK, i);
|
|
}
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
fail:
|
|
mutex_unlock(&data->lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int adux1020_write_event_config(struct iio_dev *indio_dev,
|
|
const struct iio_chan_spec *chan,
|
|
enum iio_event_type type,
|
|
enum iio_event_direction dir, int state)
|
|
{
|
|
struct adux1020_data *data = iio_priv(indio_dev);
|
|
int ret, mask;
|
|
|
|
mutex_lock(&data->lock);
|
|
|
|
ret = regmap_write(data->regmap, ADUX1020_REG_INT_ENABLE,
|
|
ADUX1020_INT_ENABLE);
|
|
if (ret < 0)
|
|
goto fail;
|
|
|
|
ret = regmap_write(data->regmap, ADUX1020_REG_INT_POLARITY, 0);
|
|
if (ret < 0)
|
|
goto fail;
|
|
|
|
switch (chan->type) {
|
|
case IIO_PROXIMITY:
|
|
if (dir == IIO_EV_DIR_RISING)
|
|
mask = ADUX1020_PROX_ON1_INT;
|
|
else
|
|
mask = ADUX1020_PROX_OFF1_INT;
|
|
|
|
if (state)
|
|
state = 0;
|
|
else
|
|
state = mask;
|
|
|
|
ret = regmap_update_bits(data->regmap, ADUX1020_REG_INT_MASK,
|
|
mask, state);
|
|
if (ret < 0)
|
|
goto fail;
|
|
|
|
/*
|
|
* Trigger proximity interrupt when the intensity is above
|
|
* or below threshold
|
|
*/
|
|
ret = regmap_update_bits(data->regmap, ADUX1020_REG_PROX_TYPE,
|
|
ADUX1020_PROX_TYPE,
|
|
ADUX1020_PROX_TYPE);
|
|
if (ret < 0)
|
|
goto fail;
|
|
|
|
/* Set proximity mode */
|
|
ret = adux1020_set_mode(data, ADUX1020_MODE_PROX_I);
|
|
break;
|
|
default:
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
fail:
|
|
mutex_unlock(&data->lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int adux1020_read_event_config(struct iio_dev *indio_dev,
|
|
const struct iio_chan_spec *chan,
|
|
enum iio_event_type type,
|
|
enum iio_event_direction dir)
|
|
{
|
|
struct adux1020_data *data = iio_priv(indio_dev);
|
|
int ret, mask;
|
|
unsigned int regval;
|
|
|
|
switch (chan->type) {
|
|
case IIO_PROXIMITY:
|
|
if (dir == IIO_EV_DIR_RISING)
|
|
mask = ADUX1020_PROX_ON1_INT;
|
|
else
|
|
mask = ADUX1020_PROX_OFF1_INT;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = regmap_read(data->regmap, ADUX1020_REG_INT_MASK, ®val);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return !(regval & mask);
|
|
}
|
|
|
|
static int adux1020_read_thresh(struct iio_dev *indio_dev,
|
|
const struct iio_chan_spec *chan,
|
|
enum iio_event_type type,
|
|
enum iio_event_direction dir,
|
|
enum iio_event_info info, int *val, int *val2)
|
|
{
|
|
struct adux1020_data *data = iio_priv(indio_dev);
|
|
u8 reg;
|
|
int ret;
|
|
unsigned int regval;
|
|
|
|
switch (chan->type) {
|
|
case IIO_PROXIMITY:
|
|
if (dir == IIO_EV_DIR_RISING)
|
|
reg = ADUX1020_REG_PROX_TH_ON1;
|
|
else
|
|
reg = ADUX1020_REG_PROX_TH_OFF1;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = regmap_read(data->regmap, reg, ®val);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
*val = regval;
|
|
|
|
return IIO_VAL_INT;
|
|
}
|
|
|
|
static int adux1020_write_thresh(struct iio_dev *indio_dev,
|
|
const struct iio_chan_spec *chan,
|
|
enum iio_event_type type,
|
|
enum iio_event_direction dir,
|
|
enum iio_event_info info, int val, int val2)
|
|
{
|
|
struct adux1020_data *data = iio_priv(indio_dev);
|
|
u8 reg;
|
|
|
|
switch (chan->type) {
|
|
case IIO_PROXIMITY:
|
|
if (dir == IIO_EV_DIR_RISING)
|
|
reg = ADUX1020_REG_PROX_TH_ON1;
|
|
else
|
|
reg = ADUX1020_REG_PROX_TH_OFF1;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Full scale threshold value is 0-65535 */
|
|
if (val < 0 || val > 65535)
|
|
return -EINVAL;
|
|
|
|
return regmap_write(data->regmap, reg, val);
|
|
}
|
|
|
|
static const struct iio_event_spec adux1020_proximity_event[] = {
|
|
{
|
|
.type = IIO_EV_TYPE_THRESH,
|
|
.dir = IIO_EV_DIR_RISING,
|
|
.mask_separate = BIT(IIO_EV_INFO_VALUE) |
|
|
BIT(IIO_EV_INFO_ENABLE),
|
|
},
|
|
{
|
|
.type = IIO_EV_TYPE_THRESH,
|
|
.dir = IIO_EV_DIR_FALLING,
|
|
.mask_separate = BIT(IIO_EV_INFO_VALUE) |
|
|
BIT(IIO_EV_INFO_ENABLE),
|
|
},
|
|
};
|
|
|
|
static const struct iio_chan_spec adux1020_channels[] = {
|
|
{
|
|
.type = IIO_PROXIMITY,
|
|
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
|
|
BIT(IIO_CHAN_INFO_SAMP_FREQ),
|
|
.event_spec = adux1020_proximity_event,
|
|
.num_event_specs = ARRAY_SIZE(adux1020_proximity_event),
|
|
},
|
|
{
|
|
.type = IIO_CURRENT,
|
|
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
|
|
.extend_name = "led",
|
|
.output = 1,
|
|
},
|
|
};
|
|
|
|
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
|
|
"0.1 0.2 0.5 1 2 5 10 20 50 100 190 450 820 1400");
|
|
|
|
static struct attribute *adux1020_attributes[] = {
|
|
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
|
|
NULL
|
|
};
|
|
|
|
static const struct attribute_group adux1020_attribute_group = {
|
|
.attrs = adux1020_attributes,
|
|
};
|
|
|
|
static const struct iio_info adux1020_info = {
|
|
.attrs = &adux1020_attribute_group,
|
|
.read_raw = adux1020_read_raw,
|
|
.write_raw = adux1020_write_raw,
|
|
.read_event_config = adux1020_read_event_config,
|
|
.write_event_config = adux1020_write_event_config,
|
|
.read_event_value = adux1020_read_thresh,
|
|
.write_event_value = adux1020_write_thresh,
|
|
};
|
|
|
|
static irqreturn_t adux1020_interrupt_handler(int irq, void *private)
|
|
{
|
|
struct iio_dev *indio_dev = private;
|
|
struct adux1020_data *data = iio_priv(indio_dev);
|
|
int ret, status;
|
|
|
|
ret = regmap_read(data->regmap, ADUX1020_REG_INT_STATUS, &status);
|
|
if (ret < 0)
|
|
return IRQ_HANDLED;
|
|
|
|
status &= ADUX1020_MODE_INT_STATUS_MASK;
|
|
|
|
if (status & ADUX1020_INT_PROX_ON1) {
|
|
iio_push_event(indio_dev,
|
|
IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0,
|
|
IIO_EV_TYPE_THRESH,
|
|
IIO_EV_DIR_RISING),
|
|
iio_get_time_ns(indio_dev));
|
|
}
|
|
|
|
if (status & ADUX1020_INT_PROX_OFF1) {
|
|
iio_push_event(indio_dev,
|
|
IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0,
|
|
IIO_EV_TYPE_THRESH,
|
|
IIO_EV_DIR_FALLING),
|
|
iio_get_time_ns(indio_dev));
|
|
}
|
|
|
|
regmap_update_bits(data->regmap, ADUX1020_REG_INT_STATUS,
|
|
ADUX1020_MODE_INT_MASK, ADUX1020_INT_CLEAR);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int adux1020_chip_init(struct adux1020_data *data)
|
|
{
|
|
struct i2c_client *client = data->client;
|
|
int ret;
|
|
unsigned int val;
|
|
|
|
ret = regmap_read(data->regmap, ADUX1020_REG_CHIP_ID, &val);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
if ((val & ADUX1020_CHIP_ID_MASK) != ADUX1020_CHIP_ID) {
|
|
dev_err(&client->dev, "invalid chip id 0x%04x\n", val);
|
|
return -ENODEV;
|
|
}
|
|
|
|
dev_dbg(&client->dev, "Detected ADUX1020 with chip id: 0x%04x\n", val);
|
|
|
|
ret = regmap_update_bits(data->regmap, ADUX1020_REG_SW_RESET,
|
|
ADUX1020_SW_RESET, ADUX1020_SW_RESET);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* Load default configuration */
|
|
ret = regmap_multi_reg_write(data->regmap, adux1020_def_conf,
|
|
ARRAY_SIZE(adux1020_def_conf));
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = adux1020_flush_fifo(data);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* Use LED_IREF for proximity mode */
|
|
ret = regmap_update_bits(data->regmap, ADUX1020_REG_LED_CURRENT,
|
|
ADUX1020_LED_PIREF_EN, 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* Mask all interrupts */
|
|
return regmap_update_bits(data->regmap, ADUX1020_REG_INT_MASK,
|
|
ADUX1020_MODE_INT_MASK, ADUX1020_MODE_INT_DISABLE);
|
|
}
|
|
|
|
static int adux1020_probe(struct i2c_client *client)
|
|
{
|
|
struct adux1020_data *data;
|
|
struct iio_dev *indio_dev;
|
|
int ret;
|
|
|
|
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
|
|
if (!indio_dev)
|
|
return -ENOMEM;
|
|
|
|
indio_dev->info = &adux1020_info;
|
|
indio_dev->name = ADUX1020_DRV_NAME;
|
|
indio_dev->channels = adux1020_channels;
|
|
indio_dev->num_channels = ARRAY_SIZE(adux1020_channels);
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
|
|
data = iio_priv(indio_dev);
|
|
|
|
data->regmap = devm_regmap_init_i2c(client, &adux1020_regmap_config);
|
|
if (IS_ERR(data->regmap)) {
|
|
dev_err(&client->dev, "regmap initialization failed.\n");
|
|
return PTR_ERR(data->regmap);
|
|
}
|
|
|
|
data->client = client;
|
|
data->indio_dev = indio_dev;
|
|
mutex_init(&data->lock);
|
|
|
|
ret = adux1020_chip_init(data);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (client->irq) {
|
|
ret = devm_request_threaded_irq(&client->dev, client->irq,
|
|
NULL, adux1020_interrupt_handler,
|
|
IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
|
|
ADUX1020_DRV_NAME, indio_dev);
|
|
if (ret) {
|
|
dev_err(&client->dev, "irq request error %d\n", -ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return devm_iio_device_register(&client->dev, indio_dev);
|
|
}
|
|
|
|
static const struct i2c_device_id adux1020_id[] = {
|
|
{ "adux1020", 0 },
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, adux1020_id);
|
|
|
|
static const struct of_device_id adux1020_of_match[] = {
|
|
{ .compatible = "adi,adux1020" },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, adux1020_of_match);
|
|
|
|
static struct i2c_driver adux1020_driver = {
|
|
.driver = {
|
|
.name = ADUX1020_DRV_NAME,
|
|
.of_match_table = adux1020_of_match,
|
|
},
|
|
.probe = adux1020_probe,
|
|
.id_table = adux1020_id,
|
|
};
|
|
module_i2c_driver(adux1020_driver);
|
|
|
|
MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
|
|
MODULE_DESCRIPTION("ADUX1020 photometric sensor");
|
|
MODULE_LICENSE("GPL");
|