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![Marcus Folkesson](/assets/img/avatar_default.png)
The core sets INDIO_BUFFER_TRIGGERED as part of devm_iio_triggered_buffer_setup(). Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Link: https://lore.kernel.org/r/20220702085005.31666-1-marcus.folkesson@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
605 lines
15 KiB
C
605 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* PNI RM3100 3-axis geomagnetic sensor driver core.
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*
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* Copyright (C) 2018 Song Qiang <songqiang1304521@gmail.com>
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*
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* User Manual available at
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* <https://www.pnicorp.com/download/rm3100-user-manual/>
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*
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* TODO: event generation, pm.
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*/
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/trigger.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <asm/unaligned.h>
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#include "rm3100.h"
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/* Cycle Count Registers. */
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#define RM3100_REG_CC_X 0x05
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#define RM3100_REG_CC_Y 0x07
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#define RM3100_REG_CC_Z 0x09
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/* Poll Measurement Mode register. */
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#define RM3100_REG_POLL 0x00
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#define RM3100_POLL_X BIT(4)
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#define RM3100_POLL_Y BIT(5)
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#define RM3100_POLL_Z BIT(6)
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/* Continuous Measurement Mode register. */
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#define RM3100_REG_CMM 0x01
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#define RM3100_CMM_START BIT(0)
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#define RM3100_CMM_X BIT(4)
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#define RM3100_CMM_Y BIT(5)
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#define RM3100_CMM_Z BIT(6)
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/* TiMe Rate Configuration register. */
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#define RM3100_REG_TMRC 0x0B
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#define RM3100_TMRC_OFFSET 0x92
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/* Result Status register. */
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#define RM3100_REG_STATUS 0x34
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#define RM3100_STATUS_DRDY BIT(7)
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/* Measurement result registers. */
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#define RM3100_REG_MX2 0x24
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#define RM3100_REG_MY2 0x27
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#define RM3100_REG_MZ2 0x2a
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#define RM3100_W_REG_START RM3100_REG_POLL
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#define RM3100_W_REG_END RM3100_REG_TMRC
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#define RM3100_R_REG_START RM3100_REG_POLL
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#define RM3100_R_REG_END RM3100_REG_STATUS
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#define RM3100_V_REG_START RM3100_REG_POLL
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#define RM3100_V_REG_END RM3100_REG_STATUS
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/*
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* This is computed by hand, is the sum of channel storage bits and padding
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* bits, which is 4+4+4+12=24 in here.
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*/
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#define RM3100_SCAN_BYTES 24
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#define RM3100_CMM_AXIS_SHIFT 4
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struct rm3100_data {
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struct regmap *regmap;
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struct completion measuring_done;
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bool use_interrupt;
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int conversion_time;
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int scale;
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/* Ensure naturally aligned timestamp */
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u8 buffer[RM3100_SCAN_BYTES] __aligned(8);
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struct iio_trigger *drdy_trig;
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/*
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* This lock is for protecting the consistency of series of i2c
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* operations, that is, to make sure a measurement process will
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* not be interrupted by a set frequency operation, which should
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* be taken where a series of i2c operation starts, released where
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* the operation ends.
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*/
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struct mutex lock;
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};
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static const struct regmap_range rm3100_readable_ranges[] = {
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regmap_reg_range(RM3100_R_REG_START, RM3100_R_REG_END),
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};
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const struct regmap_access_table rm3100_readable_table = {
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.yes_ranges = rm3100_readable_ranges,
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.n_yes_ranges = ARRAY_SIZE(rm3100_readable_ranges),
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};
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EXPORT_SYMBOL_NS_GPL(rm3100_readable_table, IIO_RM3100);
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static const struct regmap_range rm3100_writable_ranges[] = {
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regmap_reg_range(RM3100_W_REG_START, RM3100_W_REG_END),
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};
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const struct regmap_access_table rm3100_writable_table = {
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.yes_ranges = rm3100_writable_ranges,
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.n_yes_ranges = ARRAY_SIZE(rm3100_writable_ranges),
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};
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EXPORT_SYMBOL_NS_GPL(rm3100_writable_table, IIO_RM3100);
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static const struct regmap_range rm3100_volatile_ranges[] = {
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regmap_reg_range(RM3100_V_REG_START, RM3100_V_REG_END),
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};
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const struct regmap_access_table rm3100_volatile_table = {
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.yes_ranges = rm3100_volatile_ranges,
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.n_yes_ranges = ARRAY_SIZE(rm3100_volatile_ranges),
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};
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EXPORT_SYMBOL_NS_GPL(rm3100_volatile_table, IIO_RM3100);
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static irqreturn_t rm3100_thread_fn(int irq, void *d)
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{
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struct iio_dev *indio_dev = d;
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struct rm3100_data *data = iio_priv(indio_dev);
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/*
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* Write operation to any register or read operation
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* to first byte of results will clear the interrupt.
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*/
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regmap_write(data->regmap, RM3100_REG_POLL, 0);
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return IRQ_HANDLED;
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}
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static irqreturn_t rm3100_irq_handler(int irq, void *d)
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{
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struct iio_dev *indio_dev = d;
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struct rm3100_data *data = iio_priv(indio_dev);
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if (!iio_buffer_enabled(indio_dev))
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complete(&data->measuring_done);
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else
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iio_trigger_poll(data->drdy_trig);
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return IRQ_WAKE_THREAD;
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}
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static int rm3100_wait_measurement(struct rm3100_data *data)
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{
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struct regmap *regmap = data->regmap;
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unsigned int val;
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int tries = 20;
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int ret;
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/*
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* A read cycle of 400kbits i2c bus is about 20us, plus the time
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* used for scheduling, a read cycle of fast mode of this device
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* can reach 1.7ms, it may be possible for data to arrive just
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* after we check the RM3100_REG_STATUS. In this case, irq_handler is
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* called before measuring_done is reinitialized, it will wait
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* forever for data that has already been ready.
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* Reinitialize measuring_done before looking up makes sure we
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* will always capture interrupt no matter when it happens.
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*/
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if (data->use_interrupt)
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reinit_completion(&data->measuring_done);
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ret = regmap_read(regmap, RM3100_REG_STATUS, &val);
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if (ret < 0)
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return ret;
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if ((val & RM3100_STATUS_DRDY) != RM3100_STATUS_DRDY) {
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if (data->use_interrupt) {
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ret = wait_for_completion_timeout(&data->measuring_done,
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msecs_to_jiffies(data->conversion_time));
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if (!ret)
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return -ETIMEDOUT;
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} else {
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do {
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usleep_range(1000, 5000);
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ret = regmap_read(regmap, RM3100_REG_STATUS,
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&val);
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if (ret < 0)
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return ret;
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if (val & RM3100_STATUS_DRDY)
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break;
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} while (--tries);
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if (!tries)
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return -ETIMEDOUT;
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}
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}
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return 0;
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}
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static int rm3100_read_mag(struct rm3100_data *data, int idx, int *val)
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{
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struct regmap *regmap = data->regmap;
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u8 buffer[3];
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int ret;
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mutex_lock(&data->lock);
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ret = regmap_write(regmap, RM3100_REG_POLL, BIT(4 + idx));
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if (ret < 0)
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goto unlock_return;
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ret = rm3100_wait_measurement(data);
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if (ret < 0)
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goto unlock_return;
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ret = regmap_bulk_read(regmap, RM3100_REG_MX2 + 3 * idx, buffer, 3);
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if (ret < 0)
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goto unlock_return;
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mutex_unlock(&data->lock);
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*val = sign_extend32(get_unaligned_be24(&buffer[0]), 23);
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return IIO_VAL_INT;
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unlock_return:
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mutex_unlock(&data->lock);
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return ret;
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}
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#define RM3100_CHANNEL(axis, idx) \
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{ \
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.type = IIO_MAGN, \
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.modified = 1, \
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.channel2 = IIO_MOD_##axis, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
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BIT(IIO_CHAN_INFO_SAMP_FREQ), \
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.scan_index = idx, \
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.scan_type = { \
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.sign = 's', \
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.realbits = 24, \
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.storagebits = 32, \
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.shift = 8, \
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.endianness = IIO_BE, \
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}, \
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}
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static const struct iio_chan_spec rm3100_channels[] = {
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RM3100_CHANNEL(X, 0),
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RM3100_CHANNEL(Y, 1),
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RM3100_CHANNEL(Z, 2),
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IIO_CHAN_SOFT_TIMESTAMP(3),
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};
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static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
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"600 300 150 75 37 18 9 4.5 2.3 1.2 0.6 0.3 0.015 0.075"
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);
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static struct attribute *rm3100_attributes[] = {
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&iio_const_attr_sampling_frequency_available.dev_attr.attr,
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NULL,
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};
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static const struct attribute_group rm3100_attribute_group = {
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.attrs = rm3100_attributes,
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};
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#define RM3100_SAMP_NUM 14
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/*
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* Frequency : rm3100_samp_rates[][0].rm3100_samp_rates[][1]Hz.
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* Time between reading: rm3100_sam_rates[][2]ms.
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* The first one is actually 1.7ms.
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*/
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static const int rm3100_samp_rates[RM3100_SAMP_NUM][3] = {
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{600, 0, 2}, {300, 0, 3}, {150, 0, 7}, {75, 0, 13}, {37, 0, 27},
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{18, 0, 55}, {9, 0, 110}, {4, 500000, 220}, {2, 300000, 440},
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{1, 200000, 800}, {0, 600000, 1600}, {0, 300000, 3300},
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{0, 15000, 6700}, {0, 75000, 13000}
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};
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static int rm3100_get_samp_freq(struct rm3100_data *data, int *val, int *val2)
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{
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unsigned int tmp;
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int ret;
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mutex_lock(&data->lock);
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ret = regmap_read(data->regmap, RM3100_REG_TMRC, &tmp);
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mutex_unlock(&data->lock);
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if (ret < 0)
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return ret;
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*val = rm3100_samp_rates[tmp - RM3100_TMRC_OFFSET][0];
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*val2 = rm3100_samp_rates[tmp - RM3100_TMRC_OFFSET][1];
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return IIO_VAL_INT_PLUS_MICRO;
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}
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static int rm3100_set_cycle_count(struct rm3100_data *data, int val)
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{
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int ret;
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u8 i;
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for (i = 0; i < 3; i++) {
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ret = regmap_write(data->regmap, RM3100_REG_CC_X + 2 * i, val);
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if (ret < 0)
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return ret;
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}
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/*
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* The scale of this sensor depends on the cycle count value, these
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* three values are corresponding to the cycle count value 50, 100,
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* 200. scale = output / gain * 10^4.
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*/
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switch (val) {
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case 50:
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data->scale = 500;
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break;
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case 100:
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data->scale = 263;
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break;
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/*
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* case 200:
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* This function will never be called by users' code, so here we
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* assume that it will never get a wrong parameter.
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*/
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default:
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data->scale = 133;
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}
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return 0;
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}
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static int rm3100_set_samp_freq(struct iio_dev *indio_dev, int val, int val2)
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{
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struct rm3100_data *data = iio_priv(indio_dev);
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struct regmap *regmap = data->regmap;
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unsigned int cycle_count;
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int ret;
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int i;
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mutex_lock(&data->lock);
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/* All cycle count registers use the same value. */
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ret = regmap_read(regmap, RM3100_REG_CC_X, &cycle_count);
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if (ret < 0)
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goto unlock_return;
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for (i = 0; i < RM3100_SAMP_NUM; i++) {
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if (val == rm3100_samp_rates[i][0] &&
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val2 == rm3100_samp_rates[i][1])
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break;
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}
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if (i == RM3100_SAMP_NUM) {
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ret = -EINVAL;
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goto unlock_return;
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}
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ret = regmap_write(regmap, RM3100_REG_TMRC, i + RM3100_TMRC_OFFSET);
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if (ret < 0)
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goto unlock_return;
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/* Checking if cycle count registers need changing. */
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if (val == 600 && cycle_count == 200) {
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ret = rm3100_set_cycle_count(data, 100);
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if (ret < 0)
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goto unlock_return;
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} else if (val != 600 && cycle_count == 100) {
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ret = rm3100_set_cycle_count(data, 200);
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if (ret < 0)
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goto unlock_return;
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}
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if (iio_buffer_enabled(indio_dev)) {
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/* Writing TMRC registers requires CMM reset. */
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ret = regmap_write(regmap, RM3100_REG_CMM, 0);
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if (ret < 0)
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goto unlock_return;
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ret = regmap_write(data->regmap, RM3100_REG_CMM,
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(*indio_dev->active_scan_mask & 0x7) <<
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RM3100_CMM_AXIS_SHIFT | RM3100_CMM_START);
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if (ret < 0)
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goto unlock_return;
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}
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mutex_unlock(&data->lock);
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data->conversion_time = rm3100_samp_rates[i][2] * 2;
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return 0;
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unlock_return:
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mutex_unlock(&data->lock);
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return ret;
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}
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static int rm3100_read_raw(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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int *val, int *val2, long mask)
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{
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struct rm3100_data *data = iio_priv(indio_dev);
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret < 0)
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return ret;
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ret = rm3100_read_mag(data, chan->scan_index, val);
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iio_device_release_direct_mode(indio_dev);
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return ret;
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case IIO_CHAN_INFO_SCALE:
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*val = 0;
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*val2 = data->scale;
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return IIO_VAL_INT_PLUS_MICRO;
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case IIO_CHAN_INFO_SAMP_FREQ:
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return rm3100_get_samp_freq(data, val, val2);
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default:
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return -EINVAL;
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}
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}
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static int rm3100_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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switch (mask) {
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case IIO_CHAN_INFO_SAMP_FREQ:
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return rm3100_set_samp_freq(indio_dev, val, val2);
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default:
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return -EINVAL;
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}
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}
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static const struct iio_info rm3100_info = {
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.attrs = &rm3100_attribute_group,
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.read_raw = rm3100_read_raw,
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.write_raw = rm3100_write_raw,
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};
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static int rm3100_buffer_preenable(struct iio_dev *indio_dev)
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{
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struct rm3100_data *data = iio_priv(indio_dev);
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/* Starting channels enabled. */
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return regmap_write(data->regmap, RM3100_REG_CMM,
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(*indio_dev->active_scan_mask & 0x7) << RM3100_CMM_AXIS_SHIFT |
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RM3100_CMM_START);
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}
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static int rm3100_buffer_postdisable(struct iio_dev *indio_dev)
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{
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struct rm3100_data *data = iio_priv(indio_dev);
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return regmap_write(data->regmap, RM3100_REG_CMM, 0);
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}
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static const struct iio_buffer_setup_ops rm3100_buffer_ops = {
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.preenable = rm3100_buffer_preenable,
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.postdisable = rm3100_buffer_postdisable,
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};
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static irqreturn_t rm3100_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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unsigned long scan_mask = *indio_dev->active_scan_mask;
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unsigned int mask_len = indio_dev->masklength;
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struct rm3100_data *data = iio_priv(indio_dev);
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struct regmap *regmap = data->regmap;
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int ret, i, bit;
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mutex_lock(&data->lock);
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switch (scan_mask) {
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case BIT(0) | BIT(1) | BIT(2):
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ret = regmap_bulk_read(regmap, RM3100_REG_MX2, data->buffer, 9);
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mutex_unlock(&data->lock);
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if (ret < 0)
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goto done;
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/* Convert XXXYYYZZZxxx to XXXxYYYxZZZx. x for paddings. */
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for (i = 2; i > 0; i--)
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memmove(data->buffer + i * 4, data->buffer + i * 3, 3);
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|
break;
|
|
case BIT(0) | BIT(1):
|
|
ret = regmap_bulk_read(regmap, RM3100_REG_MX2, data->buffer, 6);
|
|
mutex_unlock(&data->lock);
|
|
if (ret < 0)
|
|
goto done;
|
|
memmove(data->buffer + 4, data->buffer + 3, 3);
|
|
break;
|
|
case BIT(1) | BIT(2):
|
|
ret = regmap_bulk_read(regmap, RM3100_REG_MY2, data->buffer, 6);
|
|
mutex_unlock(&data->lock);
|
|
if (ret < 0)
|
|
goto done;
|
|
memmove(data->buffer + 4, data->buffer + 3, 3);
|
|
break;
|
|
case BIT(0) | BIT(2):
|
|
ret = regmap_bulk_read(regmap, RM3100_REG_MX2, data->buffer, 9);
|
|
mutex_unlock(&data->lock);
|
|
if (ret < 0)
|
|
goto done;
|
|
memmove(data->buffer + 4, data->buffer + 6, 3);
|
|
break;
|
|
default:
|
|
for_each_set_bit(bit, &scan_mask, mask_len) {
|
|
ret = regmap_bulk_read(regmap, RM3100_REG_MX2 + 3 * bit,
|
|
data->buffer, 3);
|
|
if (ret < 0) {
|
|
mutex_unlock(&data->lock);
|
|
goto done;
|
|
}
|
|
}
|
|
mutex_unlock(&data->lock);
|
|
}
|
|
/*
|
|
* Always using the same buffer so that we wouldn't need to set the
|
|
* paddings to 0 in case of leaking any data.
|
|
*/
|
|
iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
|
|
pf->timestamp);
|
|
done:
|
|
iio_trigger_notify_done(indio_dev->trig);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
int rm3100_common_probe(struct device *dev, struct regmap *regmap, int irq)
|
|
{
|
|
struct iio_dev *indio_dev;
|
|
struct rm3100_data *data;
|
|
unsigned int tmp;
|
|
int ret;
|
|
|
|
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
|
|
if (!indio_dev)
|
|
return -ENOMEM;
|
|
|
|
data = iio_priv(indio_dev);
|
|
data->regmap = regmap;
|
|
|
|
mutex_init(&data->lock);
|
|
|
|
indio_dev->name = "rm3100";
|
|
indio_dev->info = &rm3100_info;
|
|
indio_dev->channels = rm3100_channels;
|
|
indio_dev->num_channels = ARRAY_SIZE(rm3100_channels);
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
|
|
if (!irq)
|
|
data->use_interrupt = false;
|
|
else {
|
|
data->use_interrupt = true;
|
|
|
|
init_completion(&data->measuring_done);
|
|
ret = devm_request_threaded_irq(dev,
|
|
irq,
|
|
rm3100_irq_handler,
|
|
rm3100_thread_fn,
|
|
IRQF_TRIGGER_HIGH |
|
|
IRQF_ONESHOT,
|
|
indio_dev->name,
|
|
indio_dev);
|
|
if (ret < 0) {
|
|
dev_err(dev, "request irq line failed.\n");
|
|
return ret;
|
|
}
|
|
|
|
data->drdy_trig = devm_iio_trigger_alloc(dev, "%s-drdy%d",
|
|
indio_dev->name,
|
|
iio_device_id(indio_dev));
|
|
if (!data->drdy_trig)
|
|
return -ENOMEM;
|
|
|
|
ret = devm_iio_trigger_register(dev, data->drdy_trig);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
|
|
ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
|
|
&iio_pollfunc_store_time,
|
|
rm3100_trigger_handler,
|
|
&rm3100_buffer_ops);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = regmap_read(regmap, RM3100_REG_TMRC, &tmp);
|
|
if (ret < 0)
|
|
return ret;
|
|
/* Initializing max wait time, which is double conversion time. */
|
|
data->conversion_time = rm3100_samp_rates[tmp - RM3100_TMRC_OFFSET][2]
|
|
* 2;
|
|
|
|
/* Cycle count values may not be what we want. */
|
|
if ((tmp - RM3100_TMRC_OFFSET) == 0)
|
|
rm3100_set_cycle_count(data, 100);
|
|
else
|
|
rm3100_set_cycle_count(data, 200);
|
|
|
|
return devm_iio_device_register(dev, indio_dev);
|
|
}
|
|
EXPORT_SYMBOL_NS_GPL(rm3100_common_probe, IIO_RM3100);
|
|
|
|
MODULE_AUTHOR("Song Qiang <songqiang1304521@gmail.com>");
|
|
MODULE_DESCRIPTION("PNI RM3100 3-axis magnetometer i2c driver");
|
|
MODULE_LICENSE("GPL v2");
|