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d9bdffd210
Mikrotik's Routerboard 532 has two builtin buttons, from which one triggers a hardware reset. The other one is accessible through GPIO pin 1. Sadly, this pin is being multiplexed with UART0 input, so enabling it as interrupt source (as implied by the gpio-keys driver) is not possible unless UART0 has been turned off. The later one though is a rather bad idea as the Routerboard is an embedded device with only a single serial port, so it's almost always used as serial console device. This patch adds a driver based on INPUT_POLLDEV, which disables the UART and reconfigures GPIO pin 1 temporarily while reading the button state. This procedure works fine and has been tested as part of another, unpublished driver for this device. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
347 lines
7.9 KiB
C
347 lines
7.9 KiB
C
/*
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* RouterBoard 500 Platform devices
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*
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* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
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* Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/ctype.h>
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#include <linux/string.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/serial_8250.h>
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#include <asm/bootinfo.h>
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#include <asm/mach-rc32434/rc32434.h>
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#include <asm/mach-rc32434/dma.h>
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#include <asm/mach-rc32434/dma_v.h>
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#include <asm/mach-rc32434/eth.h>
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#include <asm/mach-rc32434/rb.h>
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#include <asm/mach-rc32434/integ.h>
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#include <asm/mach-rc32434/gpio.h>
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#include <asm/mach-rc32434/irq.h>
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#define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
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#define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)
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extern unsigned int idt_cpu_freq;
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static struct mpmc_device dev3;
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void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
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{
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unsigned long flags;
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spin_lock_irqsave(&dev3.lock, flags);
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dev3.state = (dev3.state | or_mask) & ~nand_mask;
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writeb(dev3.state, dev3.base);
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spin_unlock_irqrestore(&dev3.lock, flags);
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}
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EXPORT_SYMBOL(set_latch_u5);
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unsigned char get_latch_u5(void)
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{
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return dev3.state;
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}
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EXPORT_SYMBOL(get_latch_u5);
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static struct resource korina_dev0_res[] = {
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{
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.name = "korina_regs",
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.start = ETH0_BASE_ADDR,
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.end = ETH0_BASE_ADDR + sizeof(struct eth_regs),
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.flags = IORESOURCE_MEM,
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}, {
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.name = "korina_rx",
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.start = ETH0_DMA_RX_IRQ,
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.end = ETH0_DMA_RX_IRQ,
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.flags = IORESOURCE_IRQ
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}, {
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.name = "korina_tx",
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.start = ETH0_DMA_TX_IRQ,
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.end = ETH0_DMA_TX_IRQ,
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.flags = IORESOURCE_IRQ
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}, {
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.name = "korina_ovr",
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.start = ETH0_RX_OVR_IRQ,
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.end = ETH0_RX_OVR_IRQ,
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.flags = IORESOURCE_IRQ
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}, {
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.name = "korina_und",
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.start = ETH0_TX_UND_IRQ,
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.end = ETH0_TX_UND_IRQ,
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.flags = IORESOURCE_IRQ
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}, {
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.name = "korina_dma_rx",
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.start = ETH0_RX_DMA_ADDR,
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.end = ETH0_RX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.name = "korina_dma_tx",
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.start = ETH0_TX_DMA_ADDR,
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.end = ETH0_TX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct korina_device korina_dev0_data = {
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.name = "korina0",
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.mac = {0xde, 0xca, 0xff, 0xc0, 0xff, 0xee}
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};
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static struct platform_device korina_dev0 = {
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.id = -1,
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.name = "korina",
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.dev.driver_data = &korina_dev0_data,
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.resource = korina_dev0_res,
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.num_resources = ARRAY_SIZE(korina_dev0_res),
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};
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static struct resource cf_slot0_res[] = {
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{
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.name = "cf_membase",
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.flags = IORESOURCE_MEM
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}, {
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.name = "cf_irq",
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.start = (8 + 4 * 32 + CF_GPIO_NUM), /* 149 */
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.end = (8 + 4 * 32 + CF_GPIO_NUM),
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.flags = IORESOURCE_IRQ
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}
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};
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static struct cf_device cf_slot0_data = {
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.gpio_pin = CF_GPIO_NUM
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};
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static struct platform_device cf_slot0 = {
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.id = -1,
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.name = "pata-rb532-cf",
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.dev.platform_data = &cf_slot0_data,
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.resource = cf_slot0_res,
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.num_resources = ARRAY_SIZE(cf_slot0_res),
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};
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/* Resources and device for NAND */
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static int rb532_dev_ready(struct mtd_info *mtd)
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{
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return gpio_get_value(GPIO_RDY);
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}
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static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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{
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struct nand_chip *chip = mtd->priv;
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unsigned char orbits, nandbits;
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if (ctrl & NAND_CTRL_CHANGE) {
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orbits = (ctrl & NAND_CLE) << 1;
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orbits |= (ctrl & NAND_ALE) >> 1;
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nandbits = (~ctrl & NAND_CLE) << 1;
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nandbits |= (~ctrl & NAND_ALE) >> 1;
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set_latch_u5(orbits, nandbits);
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}
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if (cmd != NAND_CMD_NONE)
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writeb(cmd, chip->IO_ADDR_W);
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}
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static struct resource nand_slot0_res[] = {
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[0] = {
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.name = "nand_membase",
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.flags = IORESOURCE_MEM
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}
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};
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static struct platform_nand_data rb532_nand_data = {
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.ctrl.dev_ready = rb532_dev_ready,
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.ctrl.cmd_ctrl = rb532_cmd_ctrl,
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};
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static struct platform_device nand_slot0 = {
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.name = "gen_nand",
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.id = -1,
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.resource = nand_slot0_res,
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.num_resources = ARRAY_SIZE(nand_slot0_res),
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.dev.platform_data = &rb532_nand_data,
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};
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static struct mtd_partition rb532_partition_info[] = {
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{
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.name = "Routerboard NAND boot",
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.offset = 0,
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.size = 4 * 1024 * 1024,
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}, {
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.name = "rootfs",
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.offset = MTDPART_OFS_NXTBLK,
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.size = MTDPART_SIZ_FULL,
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}
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};
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static struct platform_device rb532_led = {
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.name = "rb532-led",
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.id = -1,
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};
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static struct platform_device rb532_button = {
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.name = "rb532-button",
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.id = -1,
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};
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static struct resource rb532_wdt_res[] = {
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{
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.name = "rb532_wdt_res",
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.start = INTEG0_BASE_ADDR,
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.end = INTEG0_BASE_ADDR + sizeof(struct integ),
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device rb532_wdt = {
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.name = "rc32434_wdt",
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.id = -1,
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.resource = rb532_wdt_res,
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.num_resources = ARRAY_SIZE(rb532_wdt_res),
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};
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static struct plat_serial8250_port rb532_uart_res[] = {
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{
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.membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),
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.irq = UART0_IRQ,
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.regshift = 2,
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.iotype = UPIO_MEM,
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.flags = UPF_BOOT_AUTOCONF,
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},
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{
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.flags = 0,
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}
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};
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static struct platform_device rb532_uart = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev.platform_data = &rb532_uart_res,
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};
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static struct platform_device *rb532_devs[] = {
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&korina_dev0,
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&nand_slot0,
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&cf_slot0,
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&rb532_led,
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&rb532_button,
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&rb532_uart,
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&rb532_wdt
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};
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static void __init parse_mac_addr(char *macstr)
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{
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int i, j;
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unsigned char result, value;
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for (i = 0; i < 6; i++) {
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result = 0;
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if (i != 5 && *(macstr + 2) != ':')
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return;
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for (j = 0; j < 2; j++) {
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if (isxdigit(*macstr)
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&& (value =
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isdigit(*macstr) ? *macstr -
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'0' : toupper(*macstr) - 'A' + 10) < 16) {
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result = result * 16 + value;
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macstr++;
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} else
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return;
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}
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macstr++;
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korina_dev0_data.mac[i] = result;
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}
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}
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/* NAND definitions */
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#define NAND_CHIP_DELAY 25
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static void __init rb532_nand_setup(void)
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{
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switch (mips_machtype) {
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case MACH_MIKROTIK_RB532A:
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set_latch_u5(LO_FOFF | LO_CEX,
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LO_ULED | LO_ALE | LO_CLE | LO_WPX);
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break;
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default:
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set_latch_u5(LO_WPX | LO_FOFF | LO_CEX,
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LO_ULED | LO_ALE | LO_CLE);
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break;
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}
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/* Setup NAND specific settings */
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rb532_nand_data.chip.nr_chips = 1;
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rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info);
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rb532_nand_data.chip.partitions = rb532_partition_info;
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rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY;
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rb532_nand_data.chip.options = NAND_NO_AUTOINCR;
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}
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static int __init plat_setup_devices(void)
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{
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/* Look for the CF card reader */
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if (!readl(IDT434_REG_BASE + DEV1MASK))
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rb532_devs[2] = NULL; /* disable cf_slot0 at index 2 */
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else {
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cf_slot0_res[0].start =
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readl(IDT434_REG_BASE + DEV1BASE);
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cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000;
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}
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/* Read the NAND resources from the device controller */
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nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);
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nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
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/* Read and map device controller 3 */
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dev3.base = ioremap_nocache(readl(IDT434_REG_BASE + DEV3BASE), 1);
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if (!dev3.base) {
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printk(KERN_ERR "rb532: cannot remap device controller 3\n");
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return -ENXIO;
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}
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/* Initialise the NAND device */
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rb532_nand_setup();
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/* set the uart clock to the current cpu frequency */
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rb532_uart_res[0].uartclk = idt_cpu_freq;
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return platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs));
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}
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static int __init setup_kmac(char *s)
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{
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printk(KERN_INFO "korina mac = %s\n", s);
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parse_mac_addr(s);
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return 0;
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}
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__setup("kmac=", setup_kmac);
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arch_initcall(plat_setup_devices);
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