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a89dfde3dc
This ensures that a NOP is a NOP and not a random other instruction that is also a NOP. It allows simplification of dynamic code patching that wants to verify existing code before writing new instructions (ftrace, jump_label, static_call, etc..). Differentiating on NOPs is not a feature. This pessimises 32bit (DONTCARE) and 32bit on 64bit CPUs (CARELESS). 32bit is not a performance target. Everything x86_64 since AMD K10 (2007) and Intel IvyBridge (2012) is fine with using NOPL (as opposed to prefix NOP). And per FEATURE_NOPL being required for x86_64, all x86_64 CPUs can use NOPL. So stop caring about NOPs, simplify things and get on with life. [ The problem seems to be that some uarchs can only decode NOPL on a single front-end port while others have severe decode penalties for excessive prefixes. All modern uarchs can handle both, except Atom, which has prefix penalties. ] [ Also, much doubt you can actually measure any of this on normal workloads. ] After this, FEATURE_NOPL is unused except for required-features for x86_64. FEATURE_K8 is only used for PTI. [ bp: Kernel build measurements showed ~0.3s slowdown on Sandybridge which is hardly a slowdown. Get rid of X86_FEATURE_K7, while at it. ] Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Alexei Starovoitov <alexei.starovoitov@gmail.com> # bpf Acked-by: Linus Torvalds <torvalds@linuxfoundation.org> Link: https://lkml.kernel.org/r/20210312115749.065275711@infradead.org
81 lines
2 KiB
C
81 lines
2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_NOPS_H
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#define _ASM_X86_NOPS_H
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/*
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* Define nops for use with alternative() and for tracing.
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*/
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#ifndef CONFIG_64BIT
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/*
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* Generic 32bit nops from GAS:
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*
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* 1: nop
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* 2: movl %esi,%esi
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* 3: leal 0x0(%esi),%esi
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* 4: leal 0x0(%esi,%eiz,1),%esi
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* 5: leal %ds:0x0(%esi,%eiz,1),%esi
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* 6: leal 0x0(%esi),%esi
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* 7: leal 0x0(%esi,%eiz,1),%esi
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* 8: leal %ds:0x0(%esi,%eiz,1),%esi
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*
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* Except 5 and 8, which are DS prefixed 4 and 7 resp, where GAS would emit 2
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* nop instructions.
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*/
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#define BYTES_NOP1 0x90
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#define BYTES_NOP2 0x89,0xf6
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#define BYTES_NOP3 0x8d,0x76,0x00
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#define BYTES_NOP4 0x8d,0x74,0x26,0x00
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#define BYTES_NOP5 0x3e,BYTES_NOP4
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#define BYTES_NOP6 0x8d,0xb6,0x00,0x00,0x00,0x00
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#define BYTES_NOP7 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00
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#define BYTES_NOP8 0x3e,BYTES_NOP7
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#else
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/*
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* Generic 64bit nops from GAS:
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*
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* 1: nop
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* 2: osp nop
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* 3: nopl (%eax)
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* 4: nopl 0x00(%eax)
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* 5: nopl 0x00(%eax,%eax,1)
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* 6: osp nopl 0x00(%eax,%eax,1)
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* 7: nopl 0x00000000(%eax)
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* 8: nopl 0x00000000(%eax,%eax,1)
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*/
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#define BYTES_NOP1 0x90
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#define BYTES_NOP2 0x66,BYTES_NOP1
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#define BYTES_NOP3 0x0f,0x1f,0x00
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#define BYTES_NOP4 0x0f,0x1f,0x40,0x00
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#define BYTES_NOP5 0x0f,0x1f,0x44,0x00,0x00
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#define BYTES_NOP6 0x66,BYTES_NOP5
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#define BYTES_NOP7 0x0f,0x1f,0x80,0x00,0x00,0x00,0x00
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#define BYTES_NOP8 0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00
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#endif /* CONFIG_64BIT */
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#ifdef __ASSEMBLY__
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#define _ASM_MK_NOP(x) .byte x
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#else
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#define _ASM_MK_NOP(x) ".byte " __stringify(x) "\n"
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#endif
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#define ASM_NOP1 _ASM_MK_NOP(BYTES_NOP1)
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#define ASM_NOP2 _ASM_MK_NOP(BYTES_NOP2)
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#define ASM_NOP3 _ASM_MK_NOP(BYTES_NOP3)
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#define ASM_NOP4 _ASM_MK_NOP(BYTES_NOP4)
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#define ASM_NOP5 _ASM_MK_NOP(BYTES_NOP5)
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#define ASM_NOP6 _ASM_MK_NOP(BYTES_NOP6)
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#define ASM_NOP7 _ASM_MK_NOP(BYTES_NOP7)
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#define ASM_NOP8 _ASM_MK_NOP(BYTES_NOP8)
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#define ASM_NOP_MAX 8
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#ifndef __ASSEMBLY__
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extern const unsigned char * const x86_nops[];
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#endif
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#endif /* _ASM_X86_NOPS_H */
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