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linux-stable/drivers/phy/cadence
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Swapnil Jakhade 1cc455150b phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clock 
Add PHY configuration registers for single link DP with 100MHz reference
clock and NO_SSC.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210728145454.15945-7-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-17 15:42:44 +05:30
..
cdns-dphy.c phy: cadence: convert to devm_platform_ioremap_resource 2020-11-16 12:47:46 +05:30
Kconfig phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks) 2021-03-31 16:43:21 +05:30
Makefile phy: cadence: salvo: add salvo phy driver 2020-05-07 09:46:36 +05:30
phy-cadence-salvo.c phy: cadence: convert to devm_platform_ioremap_resource 2020-11-16 12:47:46 +05:30
phy-cadence-sierra.c phy: cadence: Sierra: Fix error return code in cdns_sierra_phy_probe() 2021-05-31 13:50:05 +05:30
phy-cadence-torrent.c phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clock 2021-08-17 15:42:44 +05:30