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Kan Liang 4fdf5f4ba6 perf/x86/intel: Fix unchecked MSR access error caused by VLBR_EVENT 
commit 2dc0572f2c upstream.

On a Haswell machine, the perf_fuzzer managed to trigger this message:

[117248.075892] unchecked MSR access error: WRMSR to 0x3f1 (tried to
write 0x0400000000000000) at rIP: 0xffffffff8106e4f4
(native_write_msr+0x4/0x20)
[117248.089957] Call Trace:
[117248.092685]  intel_pmu_pebs_enable_all+0x31/0x40
[117248.097737]  intel_pmu_enable_all+0xa/0x10
[117248.102210]  __perf_event_task_sched_in+0x2df/0x2f0
[117248.107511]  finish_task_switch.isra.0+0x15f/0x280
[117248.112765]  schedule_tail+0xc/0x40
[117248.116562]  ret_from_fork+0x8/0x30

A fake event called VLBR_EVENT may use the bit 58 of the PEBS_ENABLE, if
the precise_ip is set. The bit 58 is reserved by the HW. Accessing the
bit causes the unchecked MSR access error.

The fake event doesn't support PEBS. The case should be rejected.

Fixes: 097e4311cd ("perf/x86: Add constraint to create guest LBR event without hw counter")
Reported-by: Vince Weaver <vincent.weaver@maine.edu>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/1615555298-140216-2-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-25 09:04:16 +01:00
..
amd x86/events/amd/iommu: Fix sizeof mismatch 2020-10-03 16:30:56 +02:00
intel perf/x86/intel: Fix unchecked MSR access error caused by VLBR_EVENT 2021-03-25 09:04:16 +01:00
zhaoxin x86/perf: Fix a typo 2020-07-22 10:22:08 +02:00
core.c These are the performance events changes for v5.10: 2020-10-12 14:14:35 -07:00
Kconfig treewide: replace '---help---' in Kconfig files with 'help' 2020-06-14 01:57:21 +09:00
Makefile perf/x86/rapl: Fix RAPL config variable bug 2020-06-02 11:52:56 +02:00
msr.c perf/x86/msr: Add Jasper Lake support 2020-09-29 09:57:02 +02:00
perf_event.h perf/x86/intel: Make anythread filter support conditional 2020-11-09 18:12:36 +01:00
probe.c perf/x86/rapl: Make perf_probe_msr() more robust and flexible 2020-05-28 07:58:55 +02:00
probe.h perf/x86: Add MSR probe interface 2019-06-24 19:28:31 +02:00
rapl.c perf/x86: fix sysfs type mismatches 2020-11-17 13:15:38 +01:00