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![Mark A. Allyn](/assets/img/avatar_default.png)
[This is picked out of the differences between the upstream driver and the staging driver. I'm resolving the differences as a series of updates -AC] Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
56 lines
1.9 KiB
C
56 lines
1.9 KiB
C
/*
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*
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* sep_driver_hw_defs.h - Security Processor Driver hardware definitions
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*
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* Copyright(c) 2009-2011 Intel Corporation. All rights reserved.
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* Contributions(c) 2009-2011 Discretix. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59
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* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* CONTACTS:
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*
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* Mark Allyn mark.a.allyn@intel.com
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* Jayant Mangalampalli jayant.mangalampalli@intel.com
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*
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* CHANGES:
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*
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* 2010.09.20 Upgrade to Medfield
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* 2011.02.22 Enable kernel crypto
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*
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*/
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#ifndef SEP_DRIVER_HW_DEFS__H
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#define SEP_DRIVER_HW_DEFS__H
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/*----------------------- */
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/* HW Registers Defines. */
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/* */
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/*---------------------- -*/
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/* cf registers */
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#define HW_HOST_IRR_REG_ADDR 0x0A00UL
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#define HW_HOST_IMR_REG_ADDR 0x0A04UL
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#define HW_HOST_ICR_REG_ADDR 0x0A08UL
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#define HW_HOST_SEP_HOST_GPR0_REG_ADDR 0x0B00UL
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#define HW_HOST_SEP_HOST_GPR1_REG_ADDR 0x0B04UL
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#define HW_HOST_SEP_HOST_GPR2_REG_ADDR 0x0B08UL
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#define HW_HOST_SEP_HOST_GPR3_REG_ADDR 0x0B0CUL
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#define HW_HOST_HOST_SEP_GPR0_REG_ADDR 0x0B80UL
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#define HW_HOST_HOST_SEP_GPR1_REG_ADDR 0x0B84UL
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#define HW_HOST_HOST_SEP_GPR2_REG_ADDR 0x0B88UL
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#define HW_HOST_HOST_SEP_GPR3_REG_ADDR 0x0B8CUL
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#define HW_SRAM_DATA_READY_REG_ADDR 0x0F08UL
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#endif /* ifndef HW_DEFS */
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