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![Peng Fan](/assets/img/avatar_default.png)
SCMI v3.2 adds set/get parent clock commands, so update the SCMI clock driver to support them. Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20231004-scmi-clock-v3-v5-2-1b8a1435673e@nxp.com Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
346 lines
8.6 KiB
C
346 lines
8.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* System Control and Power Interface (SCMI) Protocol based clock driver
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*
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* Copyright (C) 2018-2022 ARM Ltd.
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*/
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/module.h>
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#include <linux/scmi_protocol.h>
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#include <asm/div64.h>
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#define NOT_ATOMIC false
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#define ATOMIC true
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static const struct scmi_clk_proto_ops *scmi_proto_clk_ops;
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struct scmi_clk {
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u32 id;
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struct device *dev;
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struct clk_hw hw;
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const struct scmi_clock_info *info;
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const struct scmi_protocol_handle *ph;
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struct clk_parent_data *parent_data;
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};
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#define to_scmi_clk(clk) container_of(clk, struct scmi_clk, hw)
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static unsigned long scmi_clk_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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int ret;
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u64 rate;
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struct scmi_clk *clk = to_scmi_clk(hw);
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ret = scmi_proto_clk_ops->rate_get(clk->ph, clk->id, &rate);
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if (ret)
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return 0;
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return rate;
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}
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static long scmi_clk_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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u64 fmin, fmax, ftmp;
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struct scmi_clk *clk = to_scmi_clk(hw);
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/*
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* We can't figure out what rate it will be, so just return the
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* rate back to the caller. scmi_clk_recalc_rate() will be called
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* after the rate is set and we'll know what rate the clock is
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* running at then.
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*/
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if (clk->info->rate_discrete)
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return rate;
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fmin = clk->info->range.min_rate;
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fmax = clk->info->range.max_rate;
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if (rate <= fmin)
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return fmin;
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else if (rate >= fmax)
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return fmax;
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ftmp = rate - fmin;
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ftmp += clk->info->range.step_size - 1; /* to round up */
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do_div(ftmp, clk->info->range.step_size);
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return ftmp * clk->info->range.step_size + fmin;
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}
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static int scmi_clk_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct scmi_clk *clk = to_scmi_clk(hw);
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return scmi_proto_clk_ops->rate_set(clk->ph, clk->id, rate);
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}
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static int scmi_clk_set_parent(struct clk_hw *hw, u8 parent_index)
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{
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struct scmi_clk *clk = to_scmi_clk(hw);
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return scmi_proto_clk_ops->parent_set(clk->ph, clk->id, parent_index);
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}
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static u8 scmi_clk_get_parent(struct clk_hw *hw)
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{
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struct scmi_clk *clk = to_scmi_clk(hw);
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u32 parent_id, p_idx;
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int ret;
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ret = scmi_proto_clk_ops->parent_get(clk->ph, clk->id, &parent_id);
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if (ret)
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return 0;
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for (p_idx = 0; p_idx < clk->info->num_parents; p_idx++) {
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if (clk->parent_data[p_idx].index == parent_id)
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break;
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}
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if (p_idx == clk->info->num_parents)
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return 0;
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return p_idx;
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}
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static int scmi_clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
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{
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/*
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* Suppose all the requested rates are supported, and let firmware
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* to handle the left work.
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*/
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return 0;
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}
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static int scmi_clk_enable(struct clk_hw *hw)
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{
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struct scmi_clk *clk = to_scmi_clk(hw);
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return scmi_proto_clk_ops->enable(clk->ph, clk->id, NOT_ATOMIC);
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}
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static void scmi_clk_disable(struct clk_hw *hw)
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{
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struct scmi_clk *clk = to_scmi_clk(hw);
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scmi_proto_clk_ops->disable(clk->ph, clk->id, NOT_ATOMIC);
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}
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static int scmi_clk_atomic_enable(struct clk_hw *hw)
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{
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struct scmi_clk *clk = to_scmi_clk(hw);
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return scmi_proto_clk_ops->enable(clk->ph, clk->id, ATOMIC);
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}
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static void scmi_clk_atomic_disable(struct clk_hw *hw)
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{
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struct scmi_clk *clk = to_scmi_clk(hw);
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scmi_proto_clk_ops->disable(clk->ph, clk->id, ATOMIC);
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}
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static int scmi_clk_atomic_is_enabled(struct clk_hw *hw)
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{
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int ret;
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bool enabled = false;
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struct scmi_clk *clk = to_scmi_clk(hw);
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ret = scmi_proto_clk_ops->state_get(clk->ph, clk->id, &enabled, ATOMIC);
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if (ret)
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dev_warn(clk->dev,
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"Failed to get state for clock ID %d\n", clk->id);
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return !!enabled;
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}
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/*
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* We can provide enable/disable/is_enabled atomic callbacks only if the
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* underlying SCMI transport for an SCMI instance is configured to handle
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* SCMI commands in an atomic manner.
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*
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* When no SCMI atomic transport support is available we instead provide only
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* the prepare/unprepare API, as allowed by the clock framework when atomic
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* calls are not available.
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*
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* Two distinct sets of clk_ops are provided since we could have multiple SCMI
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* instances with different underlying transport quality, so they cannot be
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* shared.
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*/
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static const struct clk_ops scmi_clk_ops = {
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.recalc_rate = scmi_clk_recalc_rate,
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.round_rate = scmi_clk_round_rate,
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.set_rate = scmi_clk_set_rate,
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.prepare = scmi_clk_enable,
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.unprepare = scmi_clk_disable,
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.set_parent = scmi_clk_set_parent,
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.get_parent = scmi_clk_get_parent,
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.determine_rate = scmi_clk_determine_rate,
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};
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static const struct clk_ops scmi_atomic_clk_ops = {
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.recalc_rate = scmi_clk_recalc_rate,
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.round_rate = scmi_clk_round_rate,
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.set_rate = scmi_clk_set_rate,
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.enable = scmi_clk_atomic_enable,
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.disable = scmi_clk_atomic_disable,
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.is_enabled = scmi_clk_atomic_is_enabled,
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.set_parent = scmi_clk_set_parent,
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.get_parent = scmi_clk_get_parent,
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.determine_rate = scmi_clk_determine_rate,
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};
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static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk,
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const struct clk_ops *scmi_ops)
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{
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int ret;
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unsigned long min_rate, max_rate;
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struct clk_init_data init = {
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.flags = CLK_GET_RATE_NOCACHE,
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.num_parents = sclk->info->num_parents,
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.ops = scmi_ops,
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.name = sclk->info->name,
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.parent_data = sclk->parent_data,
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};
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sclk->hw.init = &init;
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ret = devm_clk_hw_register(dev, &sclk->hw);
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if (ret)
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return ret;
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if (sclk->info->rate_discrete) {
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int num_rates = sclk->info->list.num_rates;
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if (num_rates <= 0)
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return -EINVAL;
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min_rate = sclk->info->list.rates[0];
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max_rate = sclk->info->list.rates[num_rates - 1];
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} else {
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min_rate = sclk->info->range.min_rate;
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max_rate = sclk->info->range.max_rate;
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}
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clk_hw_set_rate_range(&sclk->hw, min_rate, max_rate);
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return ret;
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}
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static int scmi_clocks_probe(struct scmi_device *sdev)
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{
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int idx, count, err;
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unsigned int atomic_threshold;
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bool is_atomic;
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struct clk_hw **hws;
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struct clk_hw_onecell_data *clk_data;
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struct device *dev = &sdev->dev;
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struct device_node *np = dev->of_node;
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const struct scmi_handle *handle = sdev->handle;
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struct scmi_protocol_handle *ph;
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if (!handle)
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return -ENODEV;
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scmi_proto_clk_ops =
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handle->devm_protocol_get(sdev, SCMI_PROTOCOL_CLOCK, &ph);
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if (IS_ERR(scmi_proto_clk_ops))
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return PTR_ERR(scmi_proto_clk_ops);
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count = scmi_proto_clk_ops->count_get(ph);
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if (count < 0) {
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dev_err(dev, "%pOFn: invalid clock output count\n", np);
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return -EINVAL;
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}
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clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, count),
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GFP_KERNEL);
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if (!clk_data)
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return -ENOMEM;
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clk_data->num = count;
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hws = clk_data->hws;
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is_atomic = handle->is_transport_atomic(handle, &atomic_threshold);
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for (idx = 0; idx < count; idx++) {
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struct scmi_clk *sclk;
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const struct clk_ops *scmi_ops;
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sclk = devm_kzalloc(dev, sizeof(*sclk), GFP_KERNEL);
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if (!sclk)
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return -ENOMEM;
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sclk->info = scmi_proto_clk_ops->info_get(ph, idx);
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if (!sclk->info) {
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dev_dbg(dev, "invalid clock info for idx %d\n", idx);
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devm_kfree(dev, sclk);
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continue;
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}
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sclk->id = idx;
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sclk->ph = ph;
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sclk->dev = dev;
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/*
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* Note that when transport is atomic but SCMI protocol did not
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* specify (or support) an enable_latency associated with a
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* clock, we default to use atomic operations mode.
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*/
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if (is_atomic &&
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sclk->info->enable_latency <= atomic_threshold)
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scmi_ops = &scmi_atomic_clk_ops;
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else
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scmi_ops = &scmi_clk_ops;
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/* Initialize clock parent data. */
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if (sclk->info->num_parents > 0) {
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sclk->parent_data = devm_kcalloc(dev, sclk->info->num_parents,
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sizeof(*sclk->parent_data), GFP_KERNEL);
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if (!sclk->parent_data)
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return -ENOMEM;
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for (int i = 0; i < sclk->info->num_parents; i++) {
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sclk->parent_data[i].index = sclk->info->parents[i];
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sclk->parent_data[i].hw = hws[sclk->info->parents[i]];
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}
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}
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err = scmi_clk_ops_init(dev, sclk, scmi_ops);
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if (err) {
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dev_err(dev, "failed to register clock %d\n", idx);
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devm_kfree(dev, sclk->parent_data);
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devm_kfree(dev, sclk);
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hws[idx] = NULL;
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} else {
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dev_dbg(dev, "Registered clock:%s%s\n",
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sclk->info->name,
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scmi_ops == &scmi_atomic_clk_ops ?
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" (atomic ops)" : "");
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hws[idx] = &sclk->hw;
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}
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}
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return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
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clk_data);
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}
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static const struct scmi_device_id scmi_id_table[] = {
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{ SCMI_PROTOCOL_CLOCK, "clocks" },
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{ },
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};
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MODULE_DEVICE_TABLE(scmi, scmi_id_table);
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static struct scmi_driver scmi_clocks_driver = {
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.name = "scmi-clocks",
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.probe = scmi_clocks_probe,
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.id_table = scmi_id_table,
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};
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module_scmi_driver(scmi_clocks_driver);
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MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
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MODULE_DESCRIPTION("ARM SCMI clock driver");
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MODULE_LICENSE("GPL v2");
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