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![Mark Brown](/assets/img/avatar_default.png)
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230929-clk-maple-si-v1-1-e26cfcaf27bd@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
397 lines
9.4 KiB
C
397 lines
9.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Driver for Silicon Labs Si514 Programmable Oscillator
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*
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* Copyright (C) 2015 Topic Embedded Products
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*
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* Author: Mike Looijmans <mike.looijmans@topic.nl>
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*/
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#include <linux/clk-provider.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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/* I2C registers */
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#define SI514_REG_LP 0
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#define SI514_REG_M_FRAC1 5
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#define SI514_REG_M_FRAC2 6
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#define SI514_REG_M_FRAC3 7
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#define SI514_REG_M_INT_FRAC 8
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#define SI514_REG_M_INT 9
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#define SI514_REG_HS_DIV 10
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#define SI514_REG_LS_HS_DIV 11
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#define SI514_REG_OE_STATE 14
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#define SI514_REG_RESET 128
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#define SI514_REG_CONTROL 132
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/* Register values */
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#define SI514_RESET_RST BIT(7)
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#define SI514_CONTROL_FCAL BIT(0)
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#define SI514_CONTROL_OE BIT(2)
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#define SI514_MIN_FREQ 100000U
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#define SI514_MAX_FREQ 250000000U
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#define FXO 31980000U
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#define FVCO_MIN 2080000000U
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#define FVCO_MAX 2500000000U
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#define HS_DIV_MAX 1022
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struct clk_si514 {
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struct clk_hw hw;
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struct regmap *regmap;
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struct i2c_client *i2c_client;
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};
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#define to_clk_si514(_hw) container_of(_hw, struct clk_si514, hw)
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/* Multiplier/divider settings */
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struct clk_si514_muldiv {
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u32 m_frac; /* 29-bit Fractional part of multiplier M */
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u8 m_int; /* Integer part of multiplier M, 65..78 */
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u8 ls_div_bits; /* 2nd divider, as 2^x */
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u16 hs_div; /* 1st divider, must be even and 10<=x<=1022 */
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};
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/* Enables or disables the output driver */
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static int si514_enable_output(struct clk_si514 *data, bool enable)
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{
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return regmap_update_bits(data->regmap, SI514_REG_CONTROL,
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SI514_CONTROL_OE, enable ? SI514_CONTROL_OE : 0);
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}
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static int si514_prepare(struct clk_hw *hw)
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{
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struct clk_si514 *data = to_clk_si514(hw);
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return si514_enable_output(data, true);
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}
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static void si514_unprepare(struct clk_hw *hw)
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{
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struct clk_si514 *data = to_clk_si514(hw);
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si514_enable_output(data, false);
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}
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static int si514_is_prepared(struct clk_hw *hw)
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{
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struct clk_si514 *data = to_clk_si514(hw);
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unsigned int val;
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int err;
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err = regmap_read(data->regmap, SI514_REG_CONTROL, &val);
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if (err < 0)
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return err;
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return !!(val & SI514_CONTROL_OE);
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}
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/* Retrieve clock multiplier and dividers from hardware */
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static int si514_get_muldiv(struct clk_si514 *data,
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struct clk_si514_muldiv *settings)
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{
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int err;
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u8 reg[7];
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err = regmap_bulk_read(data->regmap, SI514_REG_M_FRAC1,
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reg, ARRAY_SIZE(reg));
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if (err)
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return err;
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settings->m_frac = reg[0] | reg[1] << 8 | reg[2] << 16 |
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(reg[3] & 0x1F) << 24;
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settings->m_int = (reg[4] & 0x3f) << 3 | reg[3] >> 5;
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settings->ls_div_bits = (reg[6] >> 4) & 0x07;
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settings->hs_div = (reg[6] & 0x03) << 8 | reg[5];
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return 0;
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}
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static int si514_set_muldiv(struct clk_si514 *data,
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struct clk_si514_muldiv *settings)
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{
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u8 lp;
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u8 reg[7];
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int err;
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/* Calculate LP1/LP2 according to table 13 in the datasheet */
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/* 65.259980246 */
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if (settings->m_int < 65 ||
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(settings->m_int == 65 && settings->m_frac <= 139575831))
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lp = 0x22;
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/* 67.859763463 */
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else if (settings->m_int < 67 ||
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(settings->m_int == 67 && settings->m_frac <= 461581994))
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lp = 0x23;
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/* 72.937624981 */
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else if (settings->m_int < 72 ||
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(settings->m_int == 72 && settings->m_frac <= 503383578))
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lp = 0x33;
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/* 75.843265046 */
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else if (settings->m_int < 75 ||
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(settings->m_int == 75 && settings->m_frac <= 452724474))
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lp = 0x34;
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else
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lp = 0x44;
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err = regmap_write(data->regmap, SI514_REG_LP, lp);
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if (err < 0)
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return err;
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reg[0] = settings->m_frac;
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reg[1] = settings->m_frac >> 8;
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reg[2] = settings->m_frac >> 16;
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reg[3] = settings->m_frac >> 24 | settings->m_int << 5;
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reg[4] = settings->m_int >> 3;
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reg[5] = settings->hs_div;
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reg[6] = (settings->hs_div >> 8) | (settings->ls_div_bits << 4);
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err = regmap_bulk_write(data->regmap, SI514_REG_HS_DIV, reg + 5, 2);
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if (err < 0)
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return err;
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/*
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* Writing to SI514_REG_M_INT_FRAC triggers the clock change, so that
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* must be written last
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*/
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return regmap_bulk_write(data->regmap, SI514_REG_M_FRAC1, reg, 5);
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}
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/* Calculate divider settings for a given frequency */
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static int si514_calc_muldiv(struct clk_si514_muldiv *settings,
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unsigned long frequency)
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{
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u64 m;
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u32 ls_freq;
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u32 tmp;
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u8 res;
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if ((frequency < SI514_MIN_FREQ) || (frequency > SI514_MAX_FREQ))
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return -EINVAL;
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/* Determine the minimum value of LS_DIV and resulting target freq. */
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ls_freq = frequency;
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if (frequency >= (FVCO_MIN / HS_DIV_MAX))
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settings->ls_div_bits = 0;
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else {
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res = 1;
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tmp = 2 * HS_DIV_MAX;
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while (tmp <= (HS_DIV_MAX * 32)) {
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if ((frequency * tmp) >= FVCO_MIN)
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break;
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++res;
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tmp <<= 1;
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}
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settings->ls_div_bits = res;
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ls_freq = frequency << res;
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}
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/* Determine minimum HS_DIV, round up to even number */
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settings->hs_div = DIV_ROUND_UP(FVCO_MIN >> 1, ls_freq) << 1;
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/* M = LS_DIV x HS_DIV x frequency / F_XO (in fixed-point) */
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m = ((u64)(ls_freq * settings->hs_div) << 29) + (FXO / 2);
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do_div(m, FXO);
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settings->m_frac = (u32)m & (BIT(29) - 1);
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settings->m_int = (u32)(m >> 29);
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return 0;
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}
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/* Calculate resulting frequency given the register settings */
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static unsigned long si514_calc_rate(struct clk_si514_muldiv *settings)
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{
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u64 m = settings->m_frac | ((u64)settings->m_int << 29);
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u32 d = settings->hs_div * BIT(settings->ls_div_bits);
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return ((u32)(((m * FXO) + (FXO / 2)) >> 29)) / d;
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}
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static unsigned long si514_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_si514 *data = to_clk_si514(hw);
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struct clk_si514_muldiv settings;
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int err;
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err = si514_get_muldiv(data, &settings);
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if (err) {
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dev_err(&data->i2c_client->dev, "unable to retrieve settings\n");
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return 0;
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}
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return si514_calc_rate(&settings);
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}
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static long si514_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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struct clk_si514_muldiv settings;
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int err;
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if (!rate)
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return 0;
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err = si514_calc_muldiv(&settings, rate);
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if (err)
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return err;
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return si514_calc_rate(&settings);
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}
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/*
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* Update output frequency for big frequency changes (> 1000 ppm).
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* The chip supports <1000ppm changes "on the fly", we haven't implemented
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* that here.
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*/
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static int si514_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct clk_si514 *data = to_clk_si514(hw);
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struct clk_si514_muldiv settings;
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unsigned int old_oe_state;
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int err;
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err = si514_calc_muldiv(&settings, rate);
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if (err)
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return err;
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err = regmap_read(data->regmap, SI514_REG_CONTROL, &old_oe_state);
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if (err)
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return err;
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si514_enable_output(data, false);
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err = si514_set_muldiv(data, &settings);
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if (err < 0)
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return err; /* Undefined state now, best to leave disabled */
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/* Trigger calibration */
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err = regmap_write(data->regmap, SI514_REG_CONTROL, SI514_CONTROL_FCAL);
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if (err < 0)
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return err;
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/* Applying a new frequency can take up to 10ms */
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usleep_range(10000, 12000);
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if (old_oe_state & SI514_CONTROL_OE)
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si514_enable_output(data, true);
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return err;
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}
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static const struct clk_ops si514_clk_ops = {
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.prepare = si514_prepare,
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.unprepare = si514_unprepare,
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.is_prepared = si514_is_prepared,
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.recalc_rate = si514_recalc_rate,
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.round_rate = si514_round_rate,
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.set_rate = si514_set_rate,
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};
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static bool si514_regmap_is_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case SI514_REG_CONTROL:
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case SI514_REG_RESET:
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return true;
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default:
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return false;
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}
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}
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static bool si514_regmap_is_writeable(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case SI514_REG_LP:
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case SI514_REG_M_FRAC1 ... SI514_REG_LS_HS_DIV:
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case SI514_REG_OE_STATE:
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case SI514_REG_RESET:
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case SI514_REG_CONTROL:
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_config si514_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.cache_type = REGCACHE_MAPLE,
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.max_register = SI514_REG_CONTROL,
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.writeable_reg = si514_regmap_is_writeable,
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.volatile_reg = si514_regmap_is_volatile,
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};
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static int si514_probe(struct i2c_client *client)
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{
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struct clk_si514 *data;
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struct clk_init_data init;
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int err;
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data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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init.ops = &si514_clk_ops;
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init.flags = 0;
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init.num_parents = 0;
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data->hw.init = &init;
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data->i2c_client = client;
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if (of_property_read_string(client->dev.of_node, "clock-output-names",
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&init.name))
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init.name = client->dev.of_node->name;
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data->regmap = devm_regmap_init_i2c(client, &si514_regmap_config);
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if (IS_ERR(data->regmap)) {
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dev_err(&client->dev, "failed to allocate register map\n");
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return PTR_ERR(data->regmap);
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}
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i2c_set_clientdata(client, data);
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err = devm_clk_hw_register(&client->dev, &data->hw);
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if (err) {
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dev_err(&client->dev, "clock registration failed\n");
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return err;
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}
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err = devm_of_clk_add_hw_provider(&client->dev, of_clk_hw_simple_get,
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&data->hw);
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if (err) {
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dev_err(&client->dev, "unable to add clk provider\n");
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return err;
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}
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return 0;
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}
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static const struct i2c_device_id si514_id[] = {
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{ "si514", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, si514_id);
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static const struct of_device_id clk_si514_of_match[] = {
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{ .compatible = "silabs,si514" },
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{ },
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};
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MODULE_DEVICE_TABLE(of, clk_si514_of_match);
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static struct i2c_driver si514_driver = {
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.driver = {
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.name = "si514",
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.of_match_table = clk_si514_of_match,
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},
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.probe = si514_probe,
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.id_table = si514_id,
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};
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module_i2c_driver(si514_driver);
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MODULE_AUTHOR("Mike Looijmans <mike.looijmans@topic.nl>");
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MODULE_DESCRIPTION("Si514 driver");
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MODULE_LICENSE("GPL");
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