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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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408d808893
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it was merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Link: https://lore.kernel.org/r/20230714174434.4054728-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
143 lines
3.4 KiB
C
143 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright 2011-2012 Calxeda, Inc.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/ctype.h>
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#include <linux/edac.h>
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#include <linux/interrupt.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include "edac_module.h"
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#define SR_CLR_SB_ECC_INTR 0x0
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#define SR_CLR_DB_ECC_INTR 0x4
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struct hb_l2_drvdata {
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void __iomem *base;
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int sb_irq;
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int db_irq;
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};
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static irqreturn_t highbank_l2_err_handler(int irq, void *dev_id)
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{
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struct edac_device_ctl_info *dci = dev_id;
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struct hb_l2_drvdata *drvdata = dci->pvt_info;
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if (irq == drvdata->sb_irq) {
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writel(1, drvdata->base + SR_CLR_SB_ECC_INTR);
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edac_device_handle_ce(dci, 0, 0, dci->ctl_name);
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}
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if (irq == drvdata->db_irq) {
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writel(1, drvdata->base + SR_CLR_DB_ECC_INTR);
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edac_device_handle_ue(dci, 0, 0, dci->ctl_name);
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}
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return IRQ_HANDLED;
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}
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static const struct of_device_id hb_l2_err_of_match[] = {
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{ .compatible = "calxeda,hb-sregs-l2-ecc", },
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{},
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};
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MODULE_DEVICE_TABLE(of, hb_l2_err_of_match);
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static int highbank_l2_err_probe(struct platform_device *pdev)
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{
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const struct of_device_id *id;
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struct edac_device_ctl_info *dci;
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struct hb_l2_drvdata *drvdata;
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struct resource *r;
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int res = 0;
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dci = edac_device_alloc_ctl_info(sizeof(*drvdata), "cpu",
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1, "L", 1, 2, NULL, 0, 0);
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if (!dci)
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return -ENOMEM;
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drvdata = dci->pvt_info;
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dci->dev = &pdev->dev;
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platform_set_drvdata(pdev, dci);
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if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
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return -ENOMEM;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!r) {
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dev_err(&pdev->dev, "Unable to get mem resource\n");
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res = -ENODEV;
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goto err;
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}
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if (!devm_request_mem_region(&pdev->dev, r->start,
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resource_size(r), dev_name(&pdev->dev))) {
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dev_err(&pdev->dev, "Error while requesting mem region\n");
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res = -EBUSY;
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goto err;
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}
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drvdata->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
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if (!drvdata->base) {
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dev_err(&pdev->dev, "Unable to map regs\n");
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res = -ENOMEM;
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goto err;
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}
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id = of_match_device(hb_l2_err_of_match, &pdev->dev);
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dci->mod_name = pdev->dev.driver->name;
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dci->ctl_name = id ? id->compatible : "unknown";
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dci->dev_name = dev_name(&pdev->dev);
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if (edac_device_add_device(dci))
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goto err;
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drvdata->db_irq = platform_get_irq(pdev, 0);
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res = devm_request_irq(&pdev->dev, drvdata->db_irq,
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highbank_l2_err_handler,
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0, dev_name(&pdev->dev), dci);
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if (res < 0)
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goto err2;
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drvdata->sb_irq = platform_get_irq(pdev, 1);
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res = devm_request_irq(&pdev->dev, drvdata->sb_irq,
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highbank_l2_err_handler,
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0, dev_name(&pdev->dev), dci);
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if (res < 0)
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goto err2;
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devres_close_group(&pdev->dev, NULL);
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return 0;
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err2:
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edac_device_del_device(&pdev->dev);
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err:
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devres_release_group(&pdev->dev, NULL);
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edac_device_free_ctl_info(dci);
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return res;
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}
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static int highbank_l2_err_remove(struct platform_device *pdev)
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{
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struct edac_device_ctl_info *dci = platform_get_drvdata(pdev);
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edac_device_del_device(&pdev->dev);
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edac_device_free_ctl_info(dci);
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return 0;
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}
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static struct platform_driver highbank_l2_edac_driver = {
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.probe = highbank_l2_err_probe,
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.remove = highbank_l2_err_remove,
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.driver = {
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.name = "hb_l2_edac",
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.of_match_table = hb_l2_err_of_match,
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},
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};
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module_platform_driver(highbank_l2_edac_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Calxeda, Inc.");
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MODULE_DESCRIPTION("EDAC Driver for Calxeda Highbank L2 Cache");
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