210 lines
3.6 KiB
ArmAsm
210 lines
3.6 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#include <linux/export.h>
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#include <asm/alternative-asm.h>
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#include <asm/asm.h>
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#include <asm/asmmacro.h>
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#include <asm/asm-extable.h>
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#include <asm/cpu.h>
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#include <asm/regdef.h>
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#include <asm/unwind_hints.h>
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SYM_FUNC_START(__clear_user)
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/*
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* Some CPUs support hardware unaligned access
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*/
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ALTERNATIVE "b __clear_user_generic", \
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"b __clear_user_fast", CPU_FEATURE_UAL
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SYM_FUNC_END(__clear_user)
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EXPORT_SYMBOL(__clear_user)
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/*
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* unsigned long __clear_user_generic(void *addr, size_t size)
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*
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* a0: addr
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* a1: size
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*/
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SYM_FUNC_START(__clear_user_generic)
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beqz a1, 2f
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1: st.b zero, a0, 0
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addi.d a0, a0, 1
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addi.d a1, a1, -1
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bgtz a1, 1b
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2: move a0, a1
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jr ra
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_asm_extable 1b, 2b
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SYM_FUNC_END(__clear_user_generic)
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/*
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* unsigned long __clear_user_fast(void *addr, unsigned long size)
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*
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* a0: addr
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* a1: size
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*/
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SYM_FUNC_START(__clear_user_fast)
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sltui t0, a1, 9
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bnez t0, .Lsmall
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add.d a2, a0, a1
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0: st.d zero, a0, 0
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/* align up address */
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addi.d a0, a0, 8
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bstrins.d a0, zero, 2, 0
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addi.d a3, a2, -64
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bgeu a0, a3, .Llt64
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/* set 64 bytes at a time */
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.Lloop64:
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1: st.d zero, a0, 0
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2: st.d zero, a0, 8
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3: st.d zero, a0, 16
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4: st.d zero, a0, 24
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5: st.d zero, a0, 32
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6: st.d zero, a0, 40
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7: st.d zero, a0, 48
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8: st.d zero, a0, 56
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addi.d a0, a0, 64
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bltu a0, a3, .Lloop64
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/* set the remaining bytes */
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.Llt64:
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addi.d a3, a2, -32
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bgeu a0, a3, .Llt32
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9: st.d zero, a0, 0
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10: st.d zero, a0, 8
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11: st.d zero, a0, 16
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12: st.d zero, a0, 24
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addi.d a0, a0, 32
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.Llt32:
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addi.d a3, a2, -16
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bgeu a0, a3, .Llt16
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13: st.d zero, a0, 0
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14: st.d zero, a0, 8
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addi.d a0, a0, 16
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.Llt16:
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addi.d a3, a2, -8
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bgeu a0, a3, .Llt8
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15: st.d zero, a0, 0
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addi.d a0, a0, 8
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.Llt8:
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16: st.d zero, a2, -8
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/* return */
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move a0, zero
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jr ra
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.align 4
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.Lsmall:
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pcaddi t0, 4
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slli.d a2, a1, 4
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add.d t0, t0, a2
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jr t0
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.align 4
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move a0, zero
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jr ra
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.align 4
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17: st.b zero, a0, 0
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move a0, zero
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jr ra
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.align 4
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18: st.h zero, a0, 0
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move a0, zero
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jr ra
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.align 4
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19: st.h zero, a0, 0
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20: st.b zero, a0, 2
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move a0, zero
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jr ra
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.align 4
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21: st.w zero, a0, 0
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move a0, zero
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jr ra
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.align 4
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22: st.w zero, a0, 0
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23: st.b zero, a0, 4
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move a0, zero
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jr ra
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.align 4
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24: st.w zero, a0, 0
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25: st.h zero, a0, 4
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move a0, zero
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jr ra
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.align 4
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26: st.w zero, a0, 0
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27: st.w zero, a0, 3
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move a0, zero
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jr ra
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.align 4
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28: st.d zero, a0, 0
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move a0, zero
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jr ra
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/* fixup and ex_table */
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.Llarge_fixup:
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sub.d a1, a2, a0
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.Lsmall_fixup:
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29: st.b zero, a0, 0
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addi.d a0, a0, 1
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addi.d a1, a1, -1
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bgt a1, zero, 29b
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.Lexit:
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move a0, a1
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jr ra
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_asm_extable 0b, .Lsmall_fixup
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_asm_extable 1b, .Llarge_fixup
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_asm_extable 2b, .Llarge_fixup
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_asm_extable 3b, .Llarge_fixup
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_asm_extable 4b, .Llarge_fixup
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_asm_extable 5b, .Llarge_fixup
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_asm_extable 6b, .Llarge_fixup
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_asm_extable 7b, .Llarge_fixup
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_asm_extable 8b, .Llarge_fixup
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_asm_extable 9b, .Llarge_fixup
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_asm_extable 10b, .Llarge_fixup
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_asm_extable 11b, .Llarge_fixup
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_asm_extable 12b, .Llarge_fixup
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_asm_extable 13b, .Llarge_fixup
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_asm_extable 14b, .Llarge_fixup
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_asm_extable 15b, .Llarge_fixup
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_asm_extable 16b, .Llarge_fixup
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_asm_extable 17b, .Lexit
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_asm_extable 18b, .Lsmall_fixup
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_asm_extable 19b, .Lsmall_fixup
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_asm_extable 20b, .Lsmall_fixup
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_asm_extable 21b, .Lsmall_fixup
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_asm_extable 22b, .Lsmall_fixup
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_asm_extable 23b, .Lsmall_fixup
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_asm_extable 24b, .Lsmall_fixup
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_asm_extable 25b, .Lsmall_fixup
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_asm_extable 26b, .Lsmall_fixup
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_asm_extable 27b, .Lsmall_fixup
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_asm_extable 28b, .Lsmall_fixup
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_asm_extable 29b, .Lexit
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SYM_FUNC_END(__clear_user_fast)
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STACK_FRAME_NON_STANDARD __clear_user_fast
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