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![Markus Elfring](/assets/img/avatar_default.png)
* Add a jump target so that a specific error message is stored only once at the end of this function implementation. * Replace two calls of the function "dev_err" by goto statements. * Adjust two condition checks. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
674 lines
18 KiB
C
674 lines
18 KiB
C
/*
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* MAX77620 pin control driver.
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*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* Author:
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* Chaitanya Bandi <bandik@nvidia.com>
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* Laxman Dewangan <ldewangan@nvidia.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*/
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#include <linux/mfd/max77620.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include "core.h"
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#include "pinconf.h"
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#include "pinctrl-utils.h"
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#define MAX77620_PIN_NUM 8
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enum max77620_pin_ppdrv {
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MAX77620_PIN_UNCONFIG_DRV,
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MAX77620_PIN_OD_DRV,
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MAX77620_PIN_PP_DRV,
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};
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enum max77620_pinconf_param {
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MAX77620_ACTIVE_FPS_SOURCE = PIN_CONFIG_END + 1,
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MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
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MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS,
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MAX77620_SUSPEND_FPS_SOURCE,
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MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
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MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS,
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};
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struct max77620_pin_function {
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const char *name;
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const char * const *groups;
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unsigned int ngroups;
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int mux_option;
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};
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static const struct pinconf_generic_params max77620_cfg_params[] = {
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{
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.property = "maxim,active-fps-source",
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.param = MAX77620_ACTIVE_FPS_SOURCE,
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}, {
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.property = "maxim,active-fps-power-up-slot",
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.param = MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
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}, {
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.property = "maxim,active-fps-power-down-slot",
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.param = MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS,
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}, {
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.property = "maxim,suspend-fps-source",
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.param = MAX77620_SUSPEND_FPS_SOURCE,
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}, {
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.property = "maxim,suspend-fps-power-up-slot",
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.param = MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
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}, {
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.property = "maxim,suspend-fps-power-down-slot",
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.param = MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS,
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},
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};
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enum max77620_alternate_pinmux_option {
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MAX77620_PINMUX_GPIO = 0,
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MAX77620_PINMUX_LOW_POWER_MODE_CONTROL_IN = 1,
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MAX77620_PINMUX_FLEXIBLE_POWER_SEQUENCER_OUT = 2,
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MAX77620_PINMUX_32K_OUT1 = 3,
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MAX77620_PINMUX_SD0_DYNAMIC_VOLTAGE_SCALING_IN = 4,
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MAX77620_PINMUX_SD1_DYNAMIC_VOLTAGE_SCALING_IN = 5,
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MAX77620_PINMUX_REFERENCE_OUT = 6,
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};
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struct max77620_pingroup {
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const char *name;
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const unsigned int pins[1];
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unsigned int npins;
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enum max77620_alternate_pinmux_option alt_option;
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};
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struct max77620_pin_info {
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enum max77620_pin_ppdrv drv_type;
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int pull_config;
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};
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struct max77620_fps_config {
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int active_fps_src;
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int active_power_up_slots;
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int active_power_down_slots;
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int suspend_fps_src;
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int suspend_power_up_slots;
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int suspend_power_down_slots;
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};
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struct max77620_pctrl_info {
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struct device *dev;
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struct pinctrl_dev *pctl;
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struct regmap *rmap;
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int pins_current_opt[MAX77620_GPIO_NR];
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const struct max77620_pin_function *functions;
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unsigned int num_functions;
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const struct max77620_pingroup *pin_groups;
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int num_pin_groups;
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const struct pinctrl_pin_desc *pins;
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unsigned int num_pins;
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struct max77620_pin_info pin_info[MAX77620_PIN_NUM];
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struct max77620_fps_config fps_config[MAX77620_PIN_NUM];
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};
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static const struct pinctrl_pin_desc max77620_pins_desc[] = {
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PINCTRL_PIN(MAX77620_GPIO0, "gpio0"),
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PINCTRL_PIN(MAX77620_GPIO1, "gpio1"),
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PINCTRL_PIN(MAX77620_GPIO2, "gpio2"),
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PINCTRL_PIN(MAX77620_GPIO3, "gpio3"),
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PINCTRL_PIN(MAX77620_GPIO4, "gpio4"),
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PINCTRL_PIN(MAX77620_GPIO5, "gpio5"),
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PINCTRL_PIN(MAX77620_GPIO6, "gpio6"),
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PINCTRL_PIN(MAX77620_GPIO7, "gpio7"),
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};
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static const char * const gpio_groups[] = {
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"gpio0",
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"gpio1",
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"gpio2",
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"gpio3",
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"gpio4",
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"gpio5",
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"gpio6",
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"gpio7",
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};
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#define FUNCTION_GROUP(fname, mux) \
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{ \
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.name = fname, \
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.groups = gpio_groups, \
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.ngroups = ARRAY_SIZE(gpio_groups), \
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.mux_option = MAX77620_PINMUX_##mux, \
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}
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static const struct max77620_pin_function max77620_pin_function[] = {
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FUNCTION_GROUP("gpio", GPIO),
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FUNCTION_GROUP("lpm-control-in", LOW_POWER_MODE_CONTROL_IN),
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FUNCTION_GROUP("fps-out", FLEXIBLE_POWER_SEQUENCER_OUT),
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FUNCTION_GROUP("32k-out1", 32K_OUT1),
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FUNCTION_GROUP("sd0-dvs-in", SD0_DYNAMIC_VOLTAGE_SCALING_IN),
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FUNCTION_GROUP("sd1-dvs-in", SD1_DYNAMIC_VOLTAGE_SCALING_IN),
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FUNCTION_GROUP("reference-out", REFERENCE_OUT),
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};
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#define MAX77620_PINGROUP(pg_name, pin_id, option) \
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{ \
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.name = #pg_name, \
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.pins = {MAX77620_##pin_id}, \
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.npins = 1, \
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.alt_option = MAX77620_PINMUX_##option, \
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}
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static const struct max77620_pingroup max77620_pingroups[] = {
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MAX77620_PINGROUP(gpio0, GPIO0, LOW_POWER_MODE_CONTROL_IN),
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MAX77620_PINGROUP(gpio1, GPIO1, FLEXIBLE_POWER_SEQUENCER_OUT),
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MAX77620_PINGROUP(gpio2, GPIO2, FLEXIBLE_POWER_SEQUENCER_OUT),
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MAX77620_PINGROUP(gpio3, GPIO3, FLEXIBLE_POWER_SEQUENCER_OUT),
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MAX77620_PINGROUP(gpio4, GPIO4, 32K_OUT1),
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MAX77620_PINGROUP(gpio5, GPIO5, SD0_DYNAMIC_VOLTAGE_SCALING_IN),
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MAX77620_PINGROUP(gpio6, GPIO6, SD1_DYNAMIC_VOLTAGE_SCALING_IN),
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MAX77620_PINGROUP(gpio7, GPIO7, REFERENCE_OUT),
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};
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static int max77620_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
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return mpci->num_pin_groups;
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}
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static const char *max77620_pinctrl_get_group_name(
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struct pinctrl_dev *pctldev, unsigned int group)
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{
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struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
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return mpci->pin_groups[group].name;
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}
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static int max77620_pinctrl_get_group_pins(
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struct pinctrl_dev *pctldev, unsigned int group,
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const unsigned int **pins, unsigned int *num_pins)
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{
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struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
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*pins = mpci->pin_groups[group].pins;
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*num_pins = mpci->pin_groups[group].npins;
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return 0;
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}
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static const struct pinctrl_ops max77620_pinctrl_ops = {
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.get_groups_count = max77620_pinctrl_get_groups_count,
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.get_group_name = max77620_pinctrl_get_group_name,
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.get_group_pins = max77620_pinctrl_get_group_pins,
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.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
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.dt_free_map = pinctrl_utils_free_map,
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};
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static int max77620_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
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{
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struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
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return mpci->num_functions;
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}
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static const char *max77620_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
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unsigned int function)
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{
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struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
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return mpci->functions[function].name;
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}
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static int max77620_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
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unsigned int function,
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const char * const **groups,
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unsigned int * const num_groups)
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{
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struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
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*groups = mpci->functions[function].groups;
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*num_groups = mpci->functions[function].ngroups;
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return 0;
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}
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static int max77620_pinctrl_enable(struct pinctrl_dev *pctldev,
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unsigned int function, unsigned int group)
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{
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struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
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u8 val;
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int ret;
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if (function == MAX77620_PINMUX_GPIO) {
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val = 0;
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} else if (function == mpci->pin_groups[group].alt_option) {
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val = 1 << group;
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} else {
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dev_err(mpci->dev, "GPIO %u doesn't have function %u\n",
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group, function);
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return -EINVAL;
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}
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ret = regmap_update_bits(mpci->rmap, MAX77620_REG_AME_GPIO,
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BIT(group), val);
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if (ret < 0)
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dev_err(mpci->dev, "REG AME GPIO update failed: %d\n", ret);
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return ret;
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}
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static const struct pinmux_ops max77620_pinmux_ops = {
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.get_functions_count = max77620_pinctrl_get_funcs_count,
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.get_function_name = max77620_pinctrl_get_func_name,
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.get_function_groups = max77620_pinctrl_get_func_groups,
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.set_mux = max77620_pinctrl_enable,
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};
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static int max77620_pinconf_get(struct pinctrl_dev *pctldev,
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unsigned int pin, unsigned long *config)
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{
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struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
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struct device *dev = mpci->dev;
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enum pin_config_param param = pinconf_to_config_param(*config);
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unsigned int val;
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int arg = 0;
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int ret;
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switch (param) {
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case PIN_CONFIG_DRIVE_OPEN_DRAIN:
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if (mpci->pin_info[pin].drv_type == MAX77620_PIN_OD_DRV)
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arg = 1;
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break;
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case PIN_CONFIG_DRIVE_PUSH_PULL:
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if (mpci->pin_info[pin].drv_type == MAX77620_PIN_PP_DRV)
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arg = 1;
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break;
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case PIN_CONFIG_BIAS_PULL_UP:
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ret = regmap_read(mpci->rmap, MAX77620_REG_PUE_GPIO, &val);
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if (ret < 0) {
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dev_err(dev, "Reg PUE_GPIO read failed: %d\n", ret);
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return ret;
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}
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if (val & BIT(pin))
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arg = 1;
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break;
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case PIN_CONFIG_BIAS_PULL_DOWN:
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ret = regmap_read(mpci->rmap, MAX77620_REG_PDE_GPIO, &val);
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if (ret < 0) {
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dev_err(dev, "Reg PDE_GPIO read failed: %d\n", ret);
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return ret;
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}
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if (val & BIT(pin))
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arg = 1;
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break;
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default:
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dev_err(dev, "Properties not supported\n");
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return -ENOTSUPP;
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}
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*config = pinconf_to_config_packed(param, (u16)arg);
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return 0;
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}
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static int max77620_get_default_fps(struct max77620_pctrl_info *mpci,
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int addr, int *fps)
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{
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unsigned int val;
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int ret;
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ret = regmap_read(mpci->rmap, addr, &val);
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if (ret < 0) {
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dev_err(mpci->dev, "Reg PUE_GPIO read failed: %d\n", ret);
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return ret;
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}
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*fps = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
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return 0;
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}
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static int max77620_set_fps_param(struct max77620_pctrl_info *mpci,
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int pin, int param)
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{
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struct max77620_fps_config *fps_config = &mpci->fps_config[pin];
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int addr, ret;
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int param_val;
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int mask, shift;
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if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
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return 0;
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addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
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switch (param) {
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case MAX77620_ACTIVE_FPS_SOURCE:
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case MAX77620_SUSPEND_FPS_SOURCE:
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mask = MAX77620_FPS_SRC_MASK;
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shift = MAX77620_FPS_SRC_SHIFT;
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param_val = fps_config->active_fps_src;
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if (param == MAX77620_SUSPEND_FPS_SOURCE)
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param_val = fps_config->suspend_fps_src;
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break;
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case MAX77620_ACTIVE_FPS_POWER_ON_SLOTS:
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case MAX77620_SUSPEND_FPS_POWER_ON_SLOTS:
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mask = MAX77620_FPS_PU_PERIOD_MASK;
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shift = MAX77620_FPS_PU_PERIOD_SHIFT;
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param_val = fps_config->active_power_up_slots;
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if (param == MAX77620_SUSPEND_FPS_POWER_ON_SLOTS)
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param_val = fps_config->suspend_power_up_slots;
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break;
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case MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS:
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case MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS:
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mask = MAX77620_FPS_PD_PERIOD_MASK;
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shift = MAX77620_FPS_PD_PERIOD_SHIFT;
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param_val = fps_config->active_power_down_slots;
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if (param == MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS)
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param_val = fps_config->suspend_power_down_slots;
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break;
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default:
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dev_err(mpci->dev, "Invalid parameter %d for pin %d\n",
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param, pin);
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return -EINVAL;
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}
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if (param_val < 0)
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return 0;
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ret = regmap_update_bits(mpci->rmap, addr, mask, param_val << shift);
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if (ret < 0)
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dev_err(mpci->dev, "Reg 0x%02x update failed %d\n", addr, ret);
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return ret;
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}
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static int max77620_pinconf_set(struct pinctrl_dev *pctldev,
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unsigned int pin, unsigned long *configs,
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unsigned int num_configs)
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{
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struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
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struct device *dev = mpci->dev;
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struct max77620_fps_config *fps_config;
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int param;
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u32 param_val;
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unsigned int val;
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unsigned int pu_val;
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unsigned int pd_val;
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int addr, ret;
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int i;
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for (i = 0; i < num_configs; i++) {
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param = pinconf_to_config_param(configs[i]);
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param_val = pinconf_to_config_argument(configs[i]);
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switch (param) {
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case PIN_CONFIG_DRIVE_OPEN_DRAIN:
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val = param_val ? 0 : 1;
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ret = regmap_update_bits(mpci->rmap,
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MAX77620_REG_GPIO0 + pin,
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MAX77620_CNFG_GPIO_DRV_MASK,
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val);
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if (ret)
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goto report_update_failure;
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mpci->pin_info[pin].drv_type = val ?
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MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
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break;
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case PIN_CONFIG_DRIVE_PUSH_PULL:
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val = param_val ? 1 : 0;
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ret = regmap_update_bits(mpci->rmap,
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MAX77620_REG_GPIO0 + pin,
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MAX77620_CNFG_GPIO_DRV_MASK,
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val);
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if (ret)
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goto report_update_failure;
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mpci->pin_info[pin].drv_type = val ?
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MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
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break;
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case MAX77620_ACTIVE_FPS_SOURCE:
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case MAX77620_ACTIVE_FPS_POWER_ON_SLOTS:
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case MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS:
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if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
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return -EINVAL;
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fps_config = &mpci->fps_config[pin];
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if ((param == MAX77620_ACTIVE_FPS_SOURCE) &&
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(param_val == MAX77620_FPS_SRC_DEF)) {
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addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
|
|
ret = max77620_get_default_fps(
|
|
mpci, addr,
|
|
&fps_config->active_fps_src);
|
|
if (ret < 0)
|
|
return ret;
|
|
break;
|
|
}
|
|
|
|
if (param == MAX77620_ACTIVE_FPS_SOURCE)
|
|
fps_config->active_fps_src = param_val;
|
|
else if (param == MAX77620_ACTIVE_FPS_POWER_ON_SLOTS)
|
|
fps_config->active_power_up_slots = param_val;
|
|
else
|
|
fps_config->active_power_down_slots = param_val;
|
|
|
|
ret = max77620_set_fps_param(mpci, pin, param);
|
|
if (ret < 0)
|
|
return ret;
|
|
break;
|
|
|
|
case MAX77620_SUSPEND_FPS_SOURCE:
|
|
case MAX77620_SUSPEND_FPS_POWER_ON_SLOTS:
|
|
case MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS:
|
|
if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
|
|
return -EINVAL;
|
|
|
|
fps_config = &mpci->fps_config[pin];
|
|
|
|
if ((param == MAX77620_SUSPEND_FPS_SOURCE) &&
|
|
(param_val == MAX77620_FPS_SRC_DEF)) {
|
|
addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
|
|
ret = max77620_get_default_fps(
|
|
mpci, addr,
|
|
&fps_config->suspend_fps_src);
|
|
if (ret < 0)
|
|
return ret;
|
|
break;
|
|
}
|
|
|
|
if (param == MAX77620_SUSPEND_FPS_SOURCE)
|
|
fps_config->suspend_fps_src = param_val;
|
|
else if (param == MAX77620_SUSPEND_FPS_POWER_ON_SLOTS)
|
|
fps_config->suspend_power_up_slots = param_val;
|
|
else
|
|
fps_config->suspend_power_down_slots =
|
|
param_val;
|
|
break;
|
|
|
|
case PIN_CONFIG_BIAS_PULL_UP:
|
|
case PIN_CONFIG_BIAS_PULL_DOWN:
|
|
pu_val = (param == PIN_CONFIG_BIAS_PULL_UP) ?
|
|
BIT(pin) : 0;
|
|
pd_val = (param == PIN_CONFIG_BIAS_PULL_DOWN) ?
|
|
BIT(pin) : 0;
|
|
|
|
ret = regmap_update_bits(mpci->rmap,
|
|
MAX77620_REG_PUE_GPIO,
|
|
BIT(pin), pu_val);
|
|
if (ret < 0) {
|
|
dev_err(dev, "PUE_GPIO update failed: %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = regmap_update_bits(mpci->rmap,
|
|
MAX77620_REG_PDE_GPIO,
|
|
BIT(pin), pd_val);
|
|
if (ret < 0) {
|
|
dev_err(dev, "PDE_GPIO update failed: %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
dev_err(dev, "Properties not supported\n");
|
|
return -ENOTSUPP;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
|
|
report_update_failure:
|
|
dev_err(dev, "Reg 0x%02x update failed %d\n",
|
|
MAX77620_REG_GPIO0 + pin, ret);
|
|
return ret;
|
|
}
|
|
|
|
static const struct pinconf_ops max77620_pinconf_ops = {
|
|
.pin_config_get = max77620_pinconf_get,
|
|
.pin_config_set = max77620_pinconf_set,
|
|
};
|
|
|
|
static struct pinctrl_desc max77620_pinctrl_desc = {
|
|
.pctlops = &max77620_pinctrl_ops,
|
|
.pmxops = &max77620_pinmux_ops,
|
|
.confops = &max77620_pinconf_ops,
|
|
};
|
|
|
|
static int max77620_pinctrl_probe(struct platform_device *pdev)
|
|
{
|
|
struct max77620_chip *max77620 = dev_get_drvdata(pdev->dev.parent);
|
|
struct max77620_pctrl_info *mpci;
|
|
int i;
|
|
|
|
mpci = devm_kzalloc(&pdev->dev, sizeof(*mpci), GFP_KERNEL);
|
|
if (!mpci)
|
|
return -ENOMEM;
|
|
|
|
mpci->dev = &pdev->dev;
|
|
mpci->dev->of_node = pdev->dev.parent->of_node;
|
|
mpci->rmap = max77620->rmap;
|
|
|
|
mpci->pins = max77620_pins_desc;
|
|
mpci->num_pins = ARRAY_SIZE(max77620_pins_desc);
|
|
mpci->functions = max77620_pin_function;
|
|
mpci->num_functions = ARRAY_SIZE(max77620_pin_function);
|
|
mpci->pin_groups = max77620_pingroups;
|
|
mpci->num_pin_groups = ARRAY_SIZE(max77620_pingroups);
|
|
platform_set_drvdata(pdev, mpci);
|
|
|
|
max77620_pinctrl_desc.name = dev_name(&pdev->dev);
|
|
max77620_pinctrl_desc.pins = max77620_pins_desc;
|
|
max77620_pinctrl_desc.npins = ARRAY_SIZE(max77620_pins_desc);
|
|
max77620_pinctrl_desc.num_custom_params =
|
|
ARRAY_SIZE(max77620_cfg_params);
|
|
max77620_pinctrl_desc.custom_params = max77620_cfg_params;
|
|
|
|
for (i = 0; i < MAX77620_PIN_NUM; ++i) {
|
|
mpci->fps_config[i].active_fps_src = -1;
|
|
mpci->fps_config[i].active_power_up_slots = -1;
|
|
mpci->fps_config[i].active_power_down_slots = -1;
|
|
mpci->fps_config[i].suspend_fps_src = -1;
|
|
mpci->fps_config[i].suspend_power_up_slots = -1;
|
|
mpci->fps_config[i].suspend_power_down_slots = -1;
|
|
}
|
|
|
|
mpci->pctl = devm_pinctrl_register(&pdev->dev, &max77620_pinctrl_desc,
|
|
mpci);
|
|
if (IS_ERR(mpci->pctl)) {
|
|
dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
|
|
return PTR_ERR(mpci->pctl);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int max77620_suspend_fps_param[] = {
|
|
MAX77620_SUSPEND_FPS_SOURCE,
|
|
MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
|
|
MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS,
|
|
};
|
|
|
|
static int max77620_active_fps_param[] = {
|
|
MAX77620_ACTIVE_FPS_SOURCE,
|
|
MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
|
|
MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS,
|
|
};
|
|
|
|
static int max77620_pinctrl_suspend(struct device *dev)
|
|
{
|
|
struct max77620_pctrl_info *mpci = dev_get_drvdata(dev);
|
|
int pin, p;
|
|
|
|
for (pin = 0; pin < MAX77620_PIN_NUM; ++pin) {
|
|
if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
|
|
continue;
|
|
for (p = 0; p < 3; ++p)
|
|
max77620_set_fps_param(
|
|
mpci, pin, max77620_suspend_fps_param[p]);
|
|
}
|
|
|
|
return 0;
|
|
};
|
|
|
|
static int max77620_pinctrl_resume(struct device *dev)
|
|
{
|
|
struct max77620_pctrl_info *mpci = dev_get_drvdata(dev);
|
|
int pin, p;
|
|
|
|
for (pin = 0; pin < MAX77620_PIN_NUM; ++pin) {
|
|
if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
|
|
continue;
|
|
for (p = 0; p < 3; ++p)
|
|
max77620_set_fps_param(
|
|
mpci, pin, max77620_active_fps_param[p]);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static const struct dev_pm_ops max77620_pinctrl_pm_ops = {
|
|
SET_SYSTEM_SLEEP_PM_OPS(
|
|
max77620_pinctrl_suspend, max77620_pinctrl_resume)
|
|
};
|
|
|
|
static const struct platform_device_id max77620_pinctrl_devtype[] = {
|
|
{ .name = "max77620-pinctrl", },
|
|
{ .name = "max20024-pinctrl", },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(platform, max77620_pinctrl_devtype);
|
|
|
|
static struct platform_driver max77620_pinctrl_driver = {
|
|
.driver = {
|
|
.name = "max77620-pinctrl",
|
|
.pm = &max77620_pinctrl_pm_ops,
|
|
},
|
|
.probe = max77620_pinctrl_probe,
|
|
.id_table = max77620_pinctrl_devtype,
|
|
};
|
|
|
|
module_platform_driver(max77620_pinctrl_driver);
|
|
|
|
MODULE_DESCRIPTION("MAX77620/MAX20024 pin control driver");
|
|
MODULE_AUTHOR("Chaitanya Bandi<bandik@nvidia.com>");
|
|
MODULE_AUTHOR("Laxman Dewangan<ldewangan@nvidia.com>");
|
|
MODULE_ALIAS("platform:max77620-pinctrl");
|
|
MODULE_LICENSE("GPL v2");
|