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![Lorenzo Bianconi](/assets/img/avatar_default.png)
Add SPI_3WIRE support to spi-gpio controller introducing set_line_direction function pointer in spi_bitbang data structure. Spi-gpio controller has been tested using hts221 temp/rh iio sensor running in 3wire mode and lsm6dsm running in 4wire mode Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com> Signed-off-by: Mark Brown <broonie@kernel.org>
433 lines
11 KiB
C
433 lines
11 KiB
C
/*
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* polling/bitbanging SPI master controller driver utilities
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_bitbang.h>
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#define SPI_BITBANG_CS_DELAY 100
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/*----------------------------------------------------------------------*/
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/*
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* FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
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* Use this for GPIO or shift-register level hardware APIs.
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*
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* spi_bitbang_cs is in spi_device->controller_state, which is unavailable
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* to glue code. These bitbang setup() and cleanup() routines are always
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* used, though maybe they're called from controller-aware code.
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*
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* chipselect() and friends may use spi_device->controller_data and
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* controller registers as appropriate.
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*
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*
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* NOTE: SPI controller pins can often be used as GPIO pins instead,
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* which means you could use a bitbang driver either to get hardware
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* working quickly, or testing for differences that aren't speed related.
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*/
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struct spi_bitbang_cs {
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unsigned nsecs; /* (clock cycle time)/2 */
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u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
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u32 word, u8 bits, unsigned flags);
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unsigned (*txrx_bufs)(struct spi_device *,
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u32 (*txrx_word)(
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struct spi_device *spi,
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unsigned nsecs,
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u32 word, u8 bits,
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unsigned flags),
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unsigned, struct spi_transfer *,
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unsigned);
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};
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static unsigned bitbang_txrx_8(
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struct spi_device *spi,
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u32 (*txrx_word)(struct spi_device *spi,
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unsigned nsecs,
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u32 word, u8 bits,
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unsigned flags),
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unsigned ns,
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struct spi_transfer *t,
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unsigned flags
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) {
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unsigned bits = t->bits_per_word;
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unsigned count = t->len;
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const u8 *tx = t->tx_buf;
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u8 *rx = t->rx_buf;
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while (likely(count > 0)) {
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u8 word = 0;
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if (tx)
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word = *tx++;
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word = txrx_word(spi, ns, word, bits, flags);
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if (rx)
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*rx++ = word;
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count -= 1;
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}
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return t->len - count;
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}
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static unsigned bitbang_txrx_16(
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struct spi_device *spi,
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u32 (*txrx_word)(struct spi_device *spi,
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unsigned nsecs,
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u32 word, u8 bits,
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unsigned flags),
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unsigned ns,
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struct spi_transfer *t,
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unsigned flags
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) {
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unsigned bits = t->bits_per_word;
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unsigned count = t->len;
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const u16 *tx = t->tx_buf;
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u16 *rx = t->rx_buf;
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while (likely(count > 1)) {
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u16 word = 0;
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if (tx)
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word = *tx++;
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word = txrx_word(spi, ns, word, bits, flags);
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if (rx)
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*rx++ = word;
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count -= 2;
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}
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return t->len - count;
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}
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static unsigned bitbang_txrx_32(
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struct spi_device *spi,
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u32 (*txrx_word)(struct spi_device *spi,
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unsigned nsecs,
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u32 word, u8 bits,
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unsigned flags),
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unsigned ns,
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struct spi_transfer *t,
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unsigned flags
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) {
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unsigned bits = t->bits_per_word;
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unsigned count = t->len;
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const u32 *tx = t->tx_buf;
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u32 *rx = t->rx_buf;
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while (likely(count > 3)) {
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u32 word = 0;
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if (tx)
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word = *tx++;
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word = txrx_word(spi, ns, word, bits, flags);
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if (rx)
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*rx++ = word;
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count -= 4;
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}
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return t->len - count;
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}
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int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
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{
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struct spi_bitbang_cs *cs = spi->controller_state;
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u8 bits_per_word;
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u32 hz;
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if (t) {
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bits_per_word = t->bits_per_word;
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hz = t->speed_hz;
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} else {
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bits_per_word = 0;
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hz = 0;
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}
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/* spi_transfer level calls that work per-word */
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if (!bits_per_word)
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bits_per_word = spi->bits_per_word;
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if (bits_per_word <= 8)
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cs->txrx_bufs = bitbang_txrx_8;
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else if (bits_per_word <= 16)
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cs->txrx_bufs = bitbang_txrx_16;
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else if (bits_per_word <= 32)
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cs->txrx_bufs = bitbang_txrx_32;
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else
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return -EINVAL;
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/* nsecs = (clock period)/2 */
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if (!hz)
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hz = spi->max_speed_hz;
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if (hz) {
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cs->nsecs = (1000000000/2) / hz;
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if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
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return -EINVAL;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
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/**
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* spi_bitbang_setup - default setup for per-word I/O loops
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*/
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int spi_bitbang_setup(struct spi_device *spi)
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{
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struct spi_bitbang_cs *cs = spi->controller_state;
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struct spi_bitbang *bitbang;
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bitbang = spi_master_get_devdata(spi->master);
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if (!cs) {
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cs = kzalloc(sizeof(*cs), GFP_KERNEL);
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if (!cs)
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return -ENOMEM;
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spi->controller_state = cs;
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}
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/* per-word shift register access, in hardware or bitbanging */
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cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
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if (!cs->txrx_word)
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return -EINVAL;
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if (bitbang->setup_transfer) {
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int retval = bitbang->setup_transfer(spi, NULL);
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if (retval < 0)
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return retval;
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}
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dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
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/* NOTE we _need_ to call chipselect() early, ideally with adapter
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* setup, unless the hardware defaults cooperate to avoid confusion
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* between normal (active low) and inverted chipselects.
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*/
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/* deselect chip (low or high) */
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mutex_lock(&bitbang->lock);
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if (!bitbang->busy) {
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bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
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ndelay(cs->nsecs);
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}
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mutex_unlock(&bitbang->lock);
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return 0;
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}
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EXPORT_SYMBOL_GPL(spi_bitbang_setup);
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/**
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* spi_bitbang_cleanup - default cleanup for per-word I/O loops
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*/
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void spi_bitbang_cleanup(struct spi_device *spi)
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{
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kfree(spi->controller_state);
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}
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EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
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static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
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{
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struct spi_bitbang_cs *cs = spi->controller_state;
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unsigned nsecs = cs->nsecs;
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struct spi_bitbang *bitbang;
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bitbang = spi_master_get_devdata(spi->master);
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if (bitbang->set_line_direction) {
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int err;
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err = bitbang->set_line_direction(spi, !!(t->tx_buf));
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if (err < 0)
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return err;
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}
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if (spi->mode & SPI_3WIRE) {
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unsigned flags;
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flags = t->tx_buf ? SPI_MASTER_NO_RX : SPI_MASTER_NO_TX;
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return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, flags);
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}
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return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0);
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}
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/*----------------------------------------------------------------------*/
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/*
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* SECOND PART ... simple transfer queue runner.
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*
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* This costs a task context per controller, running the queue by
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* performing each transfer in sequence. Smarter hardware can queue
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* several DMA transfers at once, and process several controller queues
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* in parallel; this driver doesn't match such hardware very well.
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*
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* Drivers can provide word-at-a-time i/o primitives, or provide
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* transfer-at-a-time ones to leverage dma or fifo hardware.
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*/
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static int spi_bitbang_prepare_hardware(struct spi_master *spi)
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{
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struct spi_bitbang *bitbang;
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bitbang = spi_master_get_devdata(spi);
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mutex_lock(&bitbang->lock);
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bitbang->busy = 1;
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mutex_unlock(&bitbang->lock);
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return 0;
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}
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static int spi_bitbang_transfer_one(struct spi_master *master,
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struct spi_device *spi,
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struct spi_transfer *transfer)
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{
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struct spi_bitbang *bitbang = spi_master_get_devdata(master);
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int status = 0;
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if (bitbang->setup_transfer) {
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status = bitbang->setup_transfer(spi, transfer);
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if (status < 0)
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goto out;
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}
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if (transfer->len)
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status = bitbang->txrx_bufs(spi, transfer);
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if (status == transfer->len)
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status = 0;
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else if (status >= 0)
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status = -EREMOTEIO;
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out:
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spi_finalize_current_transfer(master);
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return status;
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}
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static int spi_bitbang_unprepare_hardware(struct spi_master *spi)
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{
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struct spi_bitbang *bitbang;
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bitbang = spi_master_get_devdata(spi);
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mutex_lock(&bitbang->lock);
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bitbang->busy = 0;
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mutex_unlock(&bitbang->lock);
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return 0;
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}
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static void spi_bitbang_set_cs(struct spi_device *spi, bool enable)
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{
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struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
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/* SPI core provides CS high / low, but bitbang driver
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* expects CS active
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* spi device driver takes care of handling SPI_CS_HIGH
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*/
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enable = (!!(spi->mode & SPI_CS_HIGH) == enable);
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ndelay(SPI_BITBANG_CS_DELAY);
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bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE :
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BITBANG_CS_INACTIVE);
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ndelay(SPI_BITBANG_CS_DELAY);
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}
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/*----------------------------------------------------------------------*/
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/**
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* spi_bitbang_start - start up a polled/bitbanging SPI master driver
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* @bitbang: driver handle
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*
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* Caller should have zero-initialized all parts of the structure, and then
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* provided callbacks for chip selection and I/O loops. If the master has
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* a transfer method, its final step should call spi_bitbang_transfer; or,
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* that's the default if the transfer routine is not initialized. It should
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* also set up the bus number and number of chipselects.
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*
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* For i/o loops, provide callbacks either per-word (for bitbanging, or for
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* hardware that basically exposes a shift register) or per-spi_transfer
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* (which takes better advantage of hardware like fifos or DMA engines).
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*
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* Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
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* spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
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* master methods. Those methods are the defaults if the bitbang->txrx_bufs
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* routine isn't initialized.
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*
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* This routine registers the spi_master, which will process requests in a
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* dedicated task, keeping IRQs unblocked most of the time. To stop
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* processing those requests, call spi_bitbang_stop().
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*
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* On success, this routine will take a reference to master. The caller is
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* responsible for calling spi_bitbang_stop() to decrement the reference and
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* spi_master_put() as counterpart of spi_alloc_master() to prevent a memory
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* leak.
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*/
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int spi_bitbang_start(struct spi_bitbang *bitbang)
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{
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struct spi_master *master = bitbang->master;
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int ret;
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if (!master || !bitbang->chipselect)
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return -EINVAL;
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mutex_init(&bitbang->lock);
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if (!master->mode_bits)
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master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
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if (master->transfer || master->transfer_one_message)
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return -EINVAL;
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master->prepare_transfer_hardware = spi_bitbang_prepare_hardware;
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master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware;
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master->transfer_one = spi_bitbang_transfer_one;
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master->set_cs = spi_bitbang_set_cs;
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if (!bitbang->txrx_bufs) {
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bitbang->use_dma = 0;
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bitbang->txrx_bufs = spi_bitbang_bufs;
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if (!master->setup) {
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if (!bitbang->setup_transfer)
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bitbang->setup_transfer =
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spi_bitbang_setup_transfer;
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master->setup = spi_bitbang_setup;
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master->cleanup = spi_bitbang_cleanup;
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}
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}
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/* driver may get busy before register() returns, especially
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* if someone registered boardinfo for devices
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*/
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ret = spi_register_master(spi_master_get(master));
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if (ret)
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spi_master_put(master);
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return 0;
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}
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EXPORT_SYMBOL_GPL(spi_bitbang_start);
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/**
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* spi_bitbang_stop - stops the task providing spi communication
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*/
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void spi_bitbang_stop(struct spi_bitbang *bitbang)
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{
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spi_unregister_master(bitbang->master);
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}
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EXPORT_SYMBOL_GPL(spi_bitbang_stop);
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MODULE_LICENSE("GPL");
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