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![Lukas Bulwahn](/assets/img/avatar_default.png)
Commitca7b72b5a5
("clocksource: Add driver for the Ingenic JZ47xx OST") adds the struct platform_driver ingenic_ost_driver, with the definition of pm functions under the non-existing config PM_SUSPEND, which means the intended pm functions were never actually included in any build. As the only callbacks are .suspend_noirq and .resume_noirq, we can assume that it is intended to be CONFIG_PM_SLEEP. Since commit1a3c7bb088
("PM: core: Add new *_PM_OPS macros, deprecate old ones"), the default pattern for platform_driver definitions conditional for CONFIG_PM_SLEEP is to use pm_sleep_ptr(). As __maybe_unused annotations on the dev_pm_ops structure and its callbacks are not needed anymore, remove these as well. Suggested-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20221123083159.22821-1-lukas.bulwahn@gmail.com
188 lines
4.4 KiB
C
188 lines
4.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* JZ47xx SoCs TCU Operating System Timer driver
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*
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* Copyright (C) 2016 Maarten ter Huurne <maarten@treewalker.org>
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* Copyright (C) 2020 Paul Cercueil <paul@crapouillou.net>
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*/
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#include <linux/clk.h>
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#include <linux/clocksource.h>
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#include <linux/mfd/ingenic-tcu.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/regmap.h>
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#include <linux/sched_clock.h>
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#define TCU_OST_TCSR_MASK 0xffc0
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#define TCU_OST_TCSR_CNT_MD BIT(15)
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#define TCU_OST_CHANNEL 15
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/*
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* The TCU_REG_OST_CNT{L,R} from <linux/mfd/ingenic-tcu.h> are only for the
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* regmap; these are for use with the __iomem pointer.
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*/
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#define OST_REG_CNTL 0x4
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#define OST_REG_CNTH 0x8
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struct ingenic_ost_soc_info {
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bool is64bit;
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};
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struct ingenic_ost {
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void __iomem *regs;
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struct clk *clk;
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struct clocksource cs;
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};
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static struct ingenic_ost *ingenic_ost;
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static u64 notrace ingenic_ost_read_cntl(void)
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{
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/* Read using __iomem pointer instead of regmap to avoid locking */
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return readl(ingenic_ost->regs + OST_REG_CNTL);
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}
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static u64 notrace ingenic_ost_read_cnth(void)
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{
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/* Read using __iomem pointer instead of regmap to avoid locking */
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return readl(ingenic_ost->regs + OST_REG_CNTH);
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}
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static u64 notrace ingenic_ost_clocksource_readl(struct clocksource *cs)
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{
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return ingenic_ost_read_cntl();
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}
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static u64 notrace ingenic_ost_clocksource_readh(struct clocksource *cs)
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{
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return ingenic_ost_read_cnth();
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}
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static int __init ingenic_ost_probe(struct platform_device *pdev)
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{
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const struct ingenic_ost_soc_info *soc_info;
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struct device *dev = &pdev->dev;
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struct ingenic_ost *ost;
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struct clocksource *cs;
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struct regmap *map;
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unsigned long rate;
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int err;
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soc_info = device_get_match_data(dev);
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if (!soc_info)
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return -EINVAL;
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ost = devm_kzalloc(dev, sizeof(*ost), GFP_KERNEL);
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if (!ost)
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return -ENOMEM;
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ingenic_ost = ost;
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ost->regs = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(ost->regs))
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return PTR_ERR(ost->regs);
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map = device_node_to_regmap(dev->parent->of_node);
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if (IS_ERR(map)) {
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dev_err(dev, "regmap not found");
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return PTR_ERR(map);
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}
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ost->clk = devm_clk_get(dev, "ost");
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if (IS_ERR(ost->clk))
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return PTR_ERR(ost->clk);
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err = clk_prepare_enable(ost->clk);
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if (err)
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return err;
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/* Clear counter high/low registers */
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if (soc_info->is64bit)
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regmap_write(map, TCU_REG_OST_CNTL, 0);
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regmap_write(map, TCU_REG_OST_CNTH, 0);
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/* Don't reset counter at compare value. */
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regmap_update_bits(map, TCU_REG_OST_TCSR,
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TCU_OST_TCSR_MASK, TCU_OST_TCSR_CNT_MD);
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rate = clk_get_rate(ost->clk);
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/* Enable OST TCU channel */
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regmap_write(map, TCU_REG_TESR, BIT(TCU_OST_CHANNEL));
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cs = &ost->cs;
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cs->name = "ingenic-ost";
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cs->rating = 320;
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cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
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cs->mask = CLOCKSOURCE_MASK(32);
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if (soc_info->is64bit)
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cs->read = ingenic_ost_clocksource_readl;
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else
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cs->read = ingenic_ost_clocksource_readh;
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err = clocksource_register_hz(cs, rate);
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if (err) {
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dev_err(dev, "clocksource registration failed");
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clk_disable_unprepare(ost->clk);
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return err;
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}
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if (soc_info->is64bit)
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sched_clock_register(ingenic_ost_read_cntl, 32, rate);
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else
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sched_clock_register(ingenic_ost_read_cnth, 32, rate);
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return 0;
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}
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static int ingenic_ost_suspend(struct device *dev)
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{
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struct ingenic_ost *ost = dev_get_drvdata(dev);
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clk_disable(ost->clk);
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return 0;
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}
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static int ingenic_ost_resume(struct device *dev)
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{
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struct ingenic_ost *ost = dev_get_drvdata(dev);
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return clk_enable(ost->clk);
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}
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static const struct dev_pm_ops ingenic_ost_pm_ops = {
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/* _noirq: We want the OST clock to be gated last / ungated first */
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.suspend_noirq = ingenic_ost_suspend,
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.resume_noirq = ingenic_ost_resume,
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};
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static const struct ingenic_ost_soc_info jz4725b_ost_soc_info = {
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.is64bit = false,
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};
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static const struct ingenic_ost_soc_info jz4760b_ost_soc_info = {
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.is64bit = true,
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};
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static const struct of_device_id ingenic_ost_of_match[] = {
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{ .compatible = "ingenic,jz4725b-ost", .data = &jz4725b_ost_soc_info, },
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{ .compatible = "ingenic,jz4760b-ost", .data = &jz4760b_ost_soc_info, },
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{ .compatible = "ingenic,jz4770-ost", .data = &jz4760b_ost_soc_info, },
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{ }
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};
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static struct platform_driver ingenic_ost_driver = {
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.driver = {
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.name = "ingenic-ost",
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.pm = pm_sleep_ptr(&ingenic_ost_pm_ops),
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.of_match_table = ingenic_ost_of_match,
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},
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};
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builtin_platform_driver_probe(ingenic_ost_driver, ingenic_ost_probe);
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