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![Laurent Vivier](/assets/img/avatar_default.png)
Add a clocksource based on the goldfish-rtc device. Move the timer register definition to <clocksource/timer-goldfish.h> This kernel implementation is based on the QEMU upstream implementation: https://git.qemu.org/?p=qemu.git;a=blob_plain;f=hw/rtc/goldfish_rtc.c goldfish-timer is a high-precision signed 64-bit nanosecond timer. It is part of the 'goldfish' virtual hardware platform used to run some emulated Android systems under QEMU. This timer only supports oneshot event. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20220406201523.243733-4-laurent@vivier.eu Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
153 lines
3.6 KiB
C
153 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/goldfish.h>
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#include <clocksource/timer-goldfish.h>
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struct goldfish_timer {
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struct clocksource cs;
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struct clock_event_device ced;
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struct resource res;
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void __iomem *base;
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};
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static struct goldfish_timer *ced_to_gf(struct clock_event_device *ced)
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{
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return container_of(ced, struct goldfish_timer, ced);
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}
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static struct goldfish_timer *cs_to_gf(struct clocksource *cs)
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{
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return container_of(cs, struct goldfish_timer, cs);
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}
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static u64 goldfish_timer_read(struct clocksource *cs)
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{
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struct goldfish_timer *timerdrv = cs_to_gf(cs);
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void __iomem *base = timerdrv->base;
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u32 time_low, time_high;
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u64 ticks;
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/*
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* time_low: get low bits of current time and update time_high
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* time_high: get high bits of time at last time_low read
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*/
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time_low = gf_ioread32(base + TIMER_TIME_LOW);
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time_high = gf_ioread32(base + TIMER_TIME_HIGH);
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ticks = ((u64)time_high << 32) | time_low;
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return ticks;
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}
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static int goldfish_timer_set_oneshot(struct clock_event_device *evt)
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{
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struct goldfish_timer *timerdrv = ced_to_gf(evt);
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void __iomem *base = timerdrv->base;
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gf_iowrite32(0, base + TIMER_ALARM_HIGH);
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gf_iowrite32(0, base + TIMER_ALARM_LOW);
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gf_iowrite32(1, base + TIMER_IRQ_ENABLED);
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return 0;
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}
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static int goldfish_timer_shutdown(struct clock_event_device *evt)
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{
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struct goldfish_timer *timerdrv = ced_to_gf(evt);
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void __iomem *base = timerdrv->base;
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gf_iowrite32(0, base + TIMER_IRQ_ENABLED);
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return 0;
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}
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static int goldfish_timer_next_event(unsigned long delta,
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struct clock_event_device *evt)
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{
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struct goldfish_timer *timerdrv = ced_to_gf(evt);
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void __iomem *base = timerdrv->base;
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u64 now;
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now = goldfish_timer_read(&timerdrv->cs);
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now += delta;
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gf_iowrite32(upper_32_bits(now), base + TIMER_ALARM_HIGH);
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gf_iowrite32(lower_32_bits(now), base + TIMER_ALARM_LOW);
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return 0;
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}
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static irqreturn_t goldfish_timer_irq(int irq, void *dev_id)
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{
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struct goldfish_timer *timerdrv = dev_id;
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struct clock_event_device *evt = &timerdrv->ced;
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void __iomem *base = timerdrv->base;
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gf_iowrite32(1, base + TIMER_CLEAR_INTERRUPT);
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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int __init goldfish_timer_init(int irq, void __iomem *base)
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{
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struct goldfish_timer *timerdrv;
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int ret;
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timerdrv = kzalloc(sizeof(*timerdrv), GFP_KERNEL);
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if (!timerdrv)
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return -ENOMEM;
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timerdrv->base = base;
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timerdrv->ced = (struct clock_event_device){
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.name = "goldfish_timer",
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.set_state_shutdown = goldfish_timer_shutdown,
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.set_state_oneshot = goldfish_timer_set_oneshot,
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.set_next_event = goldfish_timer_next_event,
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};
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timerdrv->res = (struct resource){
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.name = "goldfish_timer",
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.start = (unsigned long)base,
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.end = (unsigned long)base + 0xfff,
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};
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ret = request_resource(&iomem_resource, &timerdrv->res);
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if (ret) {
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pr_err("Cannot allocate '%s' resource\n", timerdrv->res.name);
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return ret;
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}
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timerdrv->cs = (struct clocksource){
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.name = "goldfish_timer",
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.rating = 400,
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.read = goldfish_timer_read,
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.mask = CLOCKSOURCE_MASK(64),
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.flags = 0,
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.max_idle_ns = LONG_MAX,
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};
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clocksource_register_hz(&timerdrv->cs, NSEC_PER_SEC);
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ret = request_irq(irq, goldfish_timer_irq, IRQF_TIMER,
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"goldfish_timer", timerdrv);
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if (ret) {
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pr_err("Couldn't register goldfish-timer interrupt\n");
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return ret;
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}
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clockevents_config_and_register(&timerdrv->ced, NSEC_PER_SEC,
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1, 0xffffffff);
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return 0;
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}
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