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![Yangtao Li](/assets/img/avatar_default.png)
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Yangtao Li <frank.li@vivo.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
308 lines
6.9 KiB
C
308 lines
6.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* CPU Frequency Scaling driver for Freescale QorIQ SoCs.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/cpufreq.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/slab.h>
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#include <linux/smp.h>
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#include <linux/platform_device.h>
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/**
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* struct cpu_data
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* @pclk: the parent clock of cpu
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* @table: frequency table
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*/
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struct cpu_data {
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struct clk **pclk;
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struct cpufreq_frequency_table *table;
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};
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/**
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* struct soc_data - SoC specific data
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* @flags: SOC_xxx
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*/
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struct soc_data {
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u32 flags;
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};
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static u32 get_bus_freq(void)
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{
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struct device_node *soc;
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u32 sysfreq;
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struct clk *pltclk;
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int ret;
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/* get platform freq by searching bus-frequency property */
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soc = of_find_node_by_type(NULL, "soc");
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if (soc) {
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ret = of_property_read_u32(soc, "bus-frequency", &sysfreq);
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of_node_put(soc);
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if (!ret)
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return sysfreq;
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}
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/* get platform freq by its clock name */
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pltclk = clk_get(NULL, "cg-pll0-div1");
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if (IS_ERR(pltclk)) {
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pr_err("%s: can't get bus frequency %ld\n",
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__func__, PTR_ERR(pltclk));
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return PTR_ERR(pltclk);
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}
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return clk_get_rate(pltclk);
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}
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static struct clk *cpu_to_clk(int cpu)
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{
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struct device_node *np;
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struct clk *clk;
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if (!cpu_present(cpu))
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return NULL;
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np = of_get_cpu_node(cpu, NULL);
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if (!np)
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return NULL;
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clk = of_clk_get(np, 0);
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of_node_put(np);
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return clk;
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}
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/* traverse cpu nodes to get cpu mask of sharing clock wire */
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static void set_affected_cpus(struct cpufreq_policy *policy)
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{
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struct cpumask *dstp = policy->cpus;
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struct clk *clk;
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int i;
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for_each_present_cpu(i) {
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clk = cpu_to_clk(i);
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if (IS_ERR(clk)) {
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pr_err("%s: no clock for cpu %d\n", __func__, i);
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continue;
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}
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if (clk_is_match(policy->clk, clk))
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cpumask_set_cpu(i, dstp);
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}
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}
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/* reduce the duplicated frequencies in frequency table */
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static void freq_table_redup(struct cpufreq_frequency_table *freq_table,
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int count)
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{
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int i, j;
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for (i = 1; i < count; i++) {
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for (j = 0; j < i; j++) {
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if (freq_table[j].frequency == CPUFREQ_ENTRY_INVALID ||
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freq_table[j].frequency !=
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freq_table[i].frequency)
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continue;
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freq_table[i].frequency = CPUFREQ_ENTRY_INVALID;
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break;
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}
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}
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}
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/* sort the frequencies in frequency table in descenting order */
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static void freq_table_sort(struct cpufreq_frequency_table *freq_table,
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int count)
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{
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int i, j, ind;
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unsigned int freq, max_freq;
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struct cpufreq_frequency_table table;
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for (i = 0; i < count - 1; i++) {
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max_freq = freq_table[i].frequency;
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ind = i;
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for (j = i + 1; j < count; j++) {
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freq = freq_table[j].frequency;
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if (freq == CPUFREQ_ENTRY_INVALID ||
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freq <= max_freq)
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continue;
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ind = j;
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max_freq = freq;
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}
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if (ind != i) {
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/* exchange the frequencies */
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table.driver_data = freq_table[i].driver_data;
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table.frequency = freq_table[i].frequency;
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freq_table[i].driver_data = freq_table[ind].driver_data;
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freq_table[i].frequency = freq_table[ind].frequency;
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freq_table[ind].driver_data = table.driver_data;
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freq_table[ind].frequency = table.frequency;
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}
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}
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}
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static int qoriq_cpufreq_cpu_init(struct cpufreq_policy *policy)
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{
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struct device_node *np;
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int i, count;
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u32 freq;
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struct clk *clk;
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const struct clk_hw *hwclk;
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struct cpufreq_frequency_table *table;
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struct cpu_data *data;
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unsigned int cpu = policy->cpu;
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u64 u64temp;
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np = of_get_cpu_node(cpu, NULL);
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if (!np)
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return -ENODEV;
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data = kzalloc(sizeof(*data), GFP_KERNEL);
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if (!data)
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goto err_np;
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policy->clk = of_clk_get(np, 0);
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if (IS_ERR(policy->clk)) {
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pr_err("%s: no clock information\n", __func__);
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goto err_nomem2;
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}
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hwclk = __clk_get_hw(policy->clk);
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count = clk_hw_get_num_parents(hwclk);
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data->pclk = kcalloc(count, sizeof(struct clk *), GFP_KERNEL);
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if (!data->pclk)
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goto err_nomem2;
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table = kcalloc(count + 1, sizeof(*table), GFP_KERNEL);
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if (!table)
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goto err_pclk;
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for (i = 0; i < count; i++) {
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clk = clk_hw_get_parent_by_index(hwclk, i)->clk;
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data->pclk[i] = clk;
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freq = clk_get_rate(clk);
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table[i].frequency = freq / 1000;
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table[i].driver_data = i;
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}
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freq_table_redup(table, count);
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freq_table_sort(table, count);
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table[i].frequency = CPUFREQ_TABLE_END;
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policy->freq_table = table;
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data->table = table;
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/* update ->cpus if we have cluster, no harm if not */
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set_affected_cpus(policy);
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policy->driver_data = data;
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/* Minimum transition latency is 12 platform clocks */
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u64temp = 12ULL * NSEC_PER_SEC;
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do_div(u64temp, get_bus_freq());
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policy->cpuinfo.transition_latency = u64temp + 1;
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of_node_put(np);
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return 0;
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err_pclk:
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kfree(data->pclk);
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err_nomem2:
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kfree(data);
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err_np:
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of_node_put(np);
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return -ENODEV;
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}
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static int qoriq_cpufreq_cpu_exit(struct cpufreq_policy *policy)
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{
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struct cpu_data *data = policy->driver_data;
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kfree(data->pclk);
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kfree(data->table);
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kfree(data);
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policy->driver_data = NULL;
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return 0;
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}
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static int qoriq_cpufreq_target(struct cpufreq_policy *policy,
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unsigned int index)
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{
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struct clk *parent;
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struct cpu_data *data = policy->driver_data;
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parent = data->pclk[data->table[index].driver_data];
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return clk_set_parent(policy->clk, parent);
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}
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static struct cpufreq_driver qoriq_cpufreq_driver = {
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.name = "qoriq_cpufreq",
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.flags = CPUFREQ_CONST_LOOPS |
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CPUFREQ_IS_COOLING_DEV,
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.init = qoriq_cpufreq_cpu_init,
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.exit = qoriq_cpufreq_cpu_exit,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = qoriq_cpufreq_target,
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.get = cpufreq_generic_get,
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.attr = cpufreq_generic_attr,
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};
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static const struct of_device_id qoriq_cpufreq_blacklist[] = {
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/* e6500 cannot use cpufreq due to erratum A-008083 */
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{ .compatible = "fsl,b4420-clockgen", },
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{ .compatible = "fsl,b4860-clockgen", },
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{ .compatible = "fsl,t2080-clockgen", },
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{ .compatible = "fsl,t4240-clockgen", },
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{}
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};
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static int qoriq_cpufreq_probe(struct platform_device *pdev)
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{
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int ret;
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struct device_node *np;
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np = of_find_matching_node(NULL, qoriq_cpufreq_blacklist);
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if (np) {
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of_node_put(np);
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dev_info(&pdev->dev, "Disabling due to erratum A-008083");
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return -ENODEV;
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}
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ret = cpufreq_register_driver(&qoriq_cpufreq_driver);
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if (ret)
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return ret;
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dev_info(&pdev->dev, "Freescale QorIQ CPU frequency scaling driver\n");
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return 0;
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}
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static void qoriq_cpufreq_remove(struct platform_device *pdev)
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{
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cpufreq_unregister_driver(&qoriq_cpufreq_driver);
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}
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static struct platform_driver qoriq_cpufreq_platform_driver = {
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.driver = {
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.name = "qoriq-cpufreq",
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},
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.probe = qoriq_cpufreq_probe,
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.remove_new = qoriq_cpufreq_remove,
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};
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module_platform_driver(qoriq_cpufreq_platform_driver);
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MODULE_ALIAS("platform:qoriq-cpufreq");
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Tang Yuantian <Yuantian.Tang@freescale.com>");
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MODULE_DESCRIPTION("cpufreq driver for Freescale QorIQ series SoCs");
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