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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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![Ed Wildgoose](/assets/img/avatar_default.png)
The original commit appears to have the logic reversed in
amd_fch_gpio_get_direction. Also confirmed by observing the value of
"direction" in the sys tree.
Signed-off-by: Ed Wildgoose <lists@wildgooses.com>
Fixes: e09d168f13
("gpio: AMD G-Series PCH gpio driver")
Cc: stable@vger.kernel.org
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
192 lines
4.9 KiB
C
192 lines
4.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* GPIO driver for the AMD G series FCH (eg. GX-412TC)
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*
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* Copyright (C) 2018 metux IT consult
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* Author: Enrico Weigelt, metux IT consult <info@metux.net>
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*
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*/
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/gpio/driver.h>
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#include <linux/platform_data/gpio/gpio-amd-fch.h>
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#include <linux/spinlock.h>
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#define AMD_FCH_MMIO_BASE 0xFED80000
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#define AMD_FCH_GPIO_BANK0_BASE 0x1500
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#define AMD_FCH_GPIO_SIZE 0x0300
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#define AMD_FCH_GPIO_FLAG_DIRECTION BIT(23)
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#define AMD_FCH_GPIO_FLAG_WRITE BIT(22)
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#define AMD_FCH_GPIO_FLAG_READ BIT(16)
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static const struct resource amd_fch_gpio_iores =
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DEFINE_RES_MEM_NAMED(
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AMD_FCH_MMIO_BASE + AMD_FCH_GPIO_BANK0_BASE,
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AMD_FCH_GPIO_SIZE,
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"amd-fch-gpio-iomem");
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struct amd_fch_gpio_priv {
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struct gpio_chip gc;
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void __iomem *base;
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struct amd_fch_gpio_pdata *pdata;
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spinlock_t lock;
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};
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static void __iomem *amd_fch_gpio_addr(struct amd_fch_gpio_priv *priv,
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unsigned int gpio)
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{
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return priv->base + priv->pdata->gpio_reg[gpio]*sizeof(u32);
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}
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static int amd_fch_gpio_direction_input(struct gpio_chip *gc,
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unsigned int offset)
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{
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unsigned long flags;
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struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
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void __iomem *ptr = amd_fch_gpio_addr(priv, offset);
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spin_lock_irqsave(&priv->lock, flags);
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writel_relaxed(readl_relaxed(ptr) & ~AMD_FCH_GPIO_FLAG_DIRECTION, ptr);
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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static int amd_fch_gpio_direction_output(struct gpio_chip *gc,
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unsigned int gpio, int value)
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{
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unsigned long flags;
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struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
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void __iomem *ptr = amd_fch_gpio_addr(priv, gpio);
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u32 val;
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spin_lock_irqsave(&priv->lock, flags);
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val = readl_relaxed(ptr);
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if (value)
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val |= AMD_FCH_GPIO_FLAG_WRITE;
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else
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val &= ~AMD_FCH_GPIO_FLAG_WRITE;
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writel_relaxed(val | AMD_FCH_GPIO_FLAG_DIRECTION, ptr);
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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static int amd_fch_gpio_get_direction(struct gpio_chip *gc, unsigned int gpio)
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{
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int ret;
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unsigned long flags;
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struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
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void __iomem *ptr = amd_fch_gpio_addr(priv, gpio);
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spin_lock_irqsave(&priv->lock, flags);
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ret = (readl_relaxed(ptr) & AMD_FCH_GPIO_FLAG_DIRECTION);
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spin_unlock_irqrestore(&priv->lock, flags);
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return ret ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
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}
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static void amd_fch_gpio_set(struct gpio_chip *gc,
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unsigned int gpio, int value)
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{
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unsigned long flags;
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struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
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void __iomem *ptr = amd_fch_gpio_addr(priv, gpio);
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u32 mask;
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spin_lock_irqsave(&priv->lock, flags);
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mask = readl_relaxed(ptr);
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if (value)
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mask |= AMD_FCH_GPIO_FLAG_WRITE;
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else
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mask &= ~AMD_FCH_GPIO_FLAG_WRITE;
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writel_relaxed(mask, ptr);
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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static int amd_fch_gpio_get(struct gpio_chip *gc,
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unsigned int offset)
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{
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unsigned long flags;
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int ret;
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struct amd_fch_gpio_priv *priv = gpiochip_get_data(gc);
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void __iomem *ptr = amd_fch_gpio_addr(priv, offset);
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spin_lock_irqsave(&priv->lock, flags);
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ret = (readl_relaxed(ptr) & AMD_FCH_GPIO_FLAG_READ);
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spin_unlock_irqrestore(&priv->lock, flags);
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return ret;
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}
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static int amd_fch_gpio_request(struct gpio_chip *chip,
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unsigned int gpio_pin)
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{
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return 0;
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}
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static int amd_fch_gpio_probe(struct platform_device *pdev)
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{
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struct amd_fch_gpio_priv *priv;
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struct amd_fch_gpio_pdata *pdata;
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pdata = dev_get_platdata(&pdev->dev);
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if (!pdata) {
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dev_err(&pdev->dev, "no platform_data\n");
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return -ENOENT;
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}
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->pdata = pdata;
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priv->gc.owner = THIS_MODULE;
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priv->gc.parent = &pdev->dev;
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priv->gc.label = dev_name(&pdev->dev);
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priv->gc.ngpio = priv->pdata->gpio_num;
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priv->gc.names = priv->pdata->gpio_names;
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priv->gc.base = -1;
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priv->gc.request = amd_fch_gpio_request;
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priv->gc.direction_input = amd_fch_gpio_direction_input;
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priv->gc.direction_output = amd_fch_gpio_direction_output;
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priv->gc.get_direction = amd_fch_gpio_get_direction;
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priv->gc.get = amd_fch_gpio_get;
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priv->gc.set = amd_fch_gpio_set;
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spin_lock_init(&priv->lock);
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priv->base = devm_ioremap_resource(&pdev->dev, &amd_fch_gpio_iores);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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platform_set_drvdata(pdev, priv);
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return devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv);
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}
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static struct platform_driver amd_fch_gpio_driver = {
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.driver = {
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.name = AMD_FCH_GPIO_DRIVER_NAME,
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},
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.probe = amd_fch_gpio_probe,
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};
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module_platform_driver(amd_fch_gpio_driver);
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MODULE_AUTHOR("Enrico Weigelt, metux IT consult <info@metux.net>");
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MODULE_DESCRIPTION("AMD G-series FCH GPIO driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:" AMD_FCH_GPIO_DRIVER_NAME);
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