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![Sascha Hauer](/assets/img/avatar_default.png)
This driver implements a GPIO multiplexer based on latches connected to other GPIOs. A set of data GPIOs is connected to the data input of multiple latches. The clock input of each latch is driven by another set of GPIOs. With two 8-bit latches 10 GPIOs can be multiplexed into 16 GPIOs. GPOs might be a better term as in fact the multiplexed pins are output only. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Bartosz: fixed the strange of_device_id formatting] Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
219 lines
6.6 KiB
C
219 lines
6.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* GPIO latch driver
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*
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* Copyright (C) 2022 Sascha Hauer <s.hauer@pengutronix.de>
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*
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* This driver implements a GPIO (or better GPO as there is no input)
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* multiplexer based on latches like this:
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*
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* CLK0 ----------------------. ,--------.
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* CLK1 -------------------. `--------|> #0 |
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* | | |
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* OUT0 ----------------+--|-----------|D0 Q0|-----|<
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* OUT1 --------------+-|--|-----------|D1 Q1|-----|<
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* OUT2 ------------+-|-|--|-----------|D2 Q2|-----|<
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* OUT3 ----------+-|-|-|--|-----------|D3 Q3|-----|<
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* OUT4 --------+-|-|-|-|--|-----------|D4 Q4|-----|<
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* OUT5 ------+-|-|-|-|-|--|-----------|D5 Q5|-----|<
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* OUT6 ----+-|-|-|-|-|-|--|-----------|D6 Q6|-----|<
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* OUT7 --+-|-|-|-|-|-|-|--|-----------|D7 Q7|-----|<
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* | | | | | | | | | `--------'
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* | | | | | | | | |
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* | | | | | | | | | ,--------.
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* | | | | | | | | `-----------|> #1 |
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* | | | | | | | | | |
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* | | | | | | | `--------------|D0 Q0|-----|<
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* | | | | | | `----------------|D1 Q1|-----|<
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* | | | | | `------------------|D2 Q2|-----|<
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* | | | | `--------------------|D3 Q3|-----|<
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* | | | `----------------------|D4 Q4|-----|<
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* | | `------------------------|D5 Q5|-----|<
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* | `--------------------------|D6 Q6|-----|<
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* `----------------------------|D7 Q7|-----|<
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* `--------'
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*
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* The above is just an example. The actual number of number of latches and
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* the number of inputs per latch is derived from the number of GPIOs given
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* in the corresponding device tree properties.
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*/
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#include <linux/err.h>
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#include <linux/gpio/consumer.h>
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#include <linux/gpio/driver.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include "gpiolib.h"
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struct gpio_latch_priv {
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struct gpio_chip gc;
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struct gpio_descs *clk_gpios;
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struct gpio_descs *latched_gpios;
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int n_latched_gpios;
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unsigned int setup_duration_ns;
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unsigned int clock_duration_ns;
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unsigned long *shadow;
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/*
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* Depending on whether any of the underlying GPIOs may sleep we either
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* use a mutex or a spinlock to protect our shadow map.
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*/
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union {
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struct mutex mutex; /* protects @shadow */
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spinlock_t spinlock; /* protects @shadow */
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};
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};
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static int gpio_latch_get_direction(struct gpio_chip *gc, unsigned int offset)
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{
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return GPIO_LINE_DIRECTION_OUT;
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}
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static void gpio_latch_set_unlocked(struct gpio_latch_priv *priv,
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void (*set)(struct gpio_desc *desc, int value),
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unsigned int offset, bool val)
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{
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int latch = offset / priv->n_latched_gpios;
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int i;
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assign_bit(offset, priv->shadow, val);
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for (i = 0; i < priv->n_latched_gpios; i++)
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set(priv->latched_gpios->desc[i],
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test_bit(latch * priv->n_latched_gpios + i, priv->shadow));
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ndelay(priv->setup_duration_ns);
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set(priv->clk_gpios->desc[latch], 1);
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ndelay(priv->clock_duration_ns);
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set(priv->clk_gpios->desc[latch], 0);
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}
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static void gpio_latch_set(struct gpio_chip *gc, unsigned int offset, int val)
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{
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struct gpio_latch_priv *priv = gpiochip_get_data(gc);
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unsigned long flags;
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spin_lock_irqsave(&priv->spinlock, flags);
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gpio_latch_set_unlocked(priv, gpiod_set_value, offset, val);
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spin_unlock_irqrestore(&priv->spinlock, flags);
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}
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static void gpio_latch_set_can_sleep(struct gpio_chip *gc, unsigned int offset, int val)
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{
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struct gpio_latch_priv *priv = gpiochip_get_data(gc);
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mutex_lock(&priv->mutex);
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gpio_latch_set_unlocked(priv, gpiod_set_value_cansleep, offset, val);
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mutex_unlock(&priv->mutex);
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}
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static bool gpio_latch_can_sleep(struct gpio_latch_priv *priv, unsigned int n_latches)
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{
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int i;
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for (i = 0; i < n_latches; i++)
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if (gpiod_cansleep(priv->clk_gpios->desc[i]))
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return true;
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for (i = 0; i < priv->n_latched_gpios; i++)
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if (gpiod_cansleep(priv->latched_gpios->desc[i]))
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return true;
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return false;
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}
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/*
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* Some value which is still acceptable to delay in atomic context.
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* If we need to go higher we might have to switch to usleep_range(),
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* but that cannot ne used in atomic context and the driver would have
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* to be adjusted to support that.
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*/
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#define DURATION_NS_MAX 5000
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static int gpio_latch_probe(struct platform_device *pdev)
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{
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struct gpio_latch_priv *priv;
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unsigned int n_latches;
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struct device_node *np = pdev->dev.of_node;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->clk_gpios = devm_gpiod_get_array(&pdev->dev, "clk", GPIOD_OUT_LOW);
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if (IS_ERR(priv->clk_gpios))
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return PTR_ERR(priv->clk_gpios);
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priv->latched_gpios = devm_gpiod_get_array(&pdev->dev, "latched", GPIOD_OUT_LOW);
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if (IS_ERR(priv->latched_gpios))
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return PTR_ERR(priv->latched_gpios);
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n_latches = priv->clk_gpios->ndescs;
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priv->n_latched_gpios = priv->latched_gpios->ndescs;
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priv->shadow = devm_bitmap_zalloc(&pdev->dev, n_latches * priv->n_latched_gpios,
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GFP_KERNEL);
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if (!priv->shadow)
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return -ENOMEM;
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if (gpio_latch_can_sleep(priv, n_latches)) {
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priv->gc.can_sleep = true;
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priv->gc.set = gpio_latch_set_can_sleep;
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mutex_init(&priv->mutex);
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} else {
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priv->gc.can_sleep = false;
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priv->gc.set = gpio_latch_set;
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spin_lock_init(&priv->spinlock);
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}
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of_property_read_u32(np, "setup-duration-ns", &priv->setup_duration_ns);
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if (priv->setup_duration_ns > DURATION_NS_MAX) {
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dev_warn(&pdev->dev, "setup-duration-ns too high, limit to %d\n",
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DURATION_NS_MAX);
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priv->setup_duration_ns = DURATION_NS_MAX;
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}
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of_property_read_u32(np, "clock-duration-ns", &priv->clock_duration_ns);
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if (priv->clock_duration_ns > DURATION_NS_MAX) {
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dev_warn(&pdev->dev, "clock-duration-ns too high, limit to %d\n",
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DURATION_NS_MAX);
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priv->clock_duration_ns = DURATION_NS_MAX;
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}
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priv->gc.get_direction = gpio_latch_get_direction;
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priv->gc.ngpio = n_latches * priv->n_latched_gpios;
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priv->gc.owner = THIS_MODULE;
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priv->gc.base = -1;
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priv->gc.parent = &pdev->dev;
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platform_set_drvdata(pdev, priv);
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return devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv);
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}
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static const struct of_device_id gpio_latch_ids[] = {
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{
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.compatible = "gpio-latch",
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},
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, gpio_latch_ids);
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static struct platform_driver gpio_latch_driver = {
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.driver = {
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.name = "gpio-latch",
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.of_match_table = gpio_latch_ids,
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},
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.probe = gpio_latch_probe,
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};
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module_platform_driver(gpio_latch_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
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MODULE_DESCRIPTION("GPIO latch driver");
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