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![Rob Herring](/assets/img/avatar_default.png)
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Tzung-Bi Shih <tzungbi@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
362 lines
8.4 KiB
C
362 lines
8.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Expose a PWM controlled by the ChromeOS EC to the host processor.
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*
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* Copyright (C) 2016 Google, Inc.
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*/
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_data/cros_ec_commands.h>
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#include <linux/platform_data/cros_ec_proto.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/slab.h>
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#include <dt-bindings/mfd/cros_ec.h>
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/**
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* struct cros_ec_pwm_device - Driver data for EC PWM
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*
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* @dev: Device node
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* @ec: Pointer to EC device
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* @chip: PWM controller chip
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* @use_pwm_type: Use PWM types instead of generic channels
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*/
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struct cros_ec_pwm_device {
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struct device *dev;
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struct cros_ec_device *ec;
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struct pwm_chip chip;
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bool use_pwm_type;
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};
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/**
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* struct cros_ec_pwm - per-PWM driver data
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* @duty_cycle: cached duty cycle
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*/
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struct cros_ec_pwm {
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u16 duty_cycle;
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};
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static inline struct cros_ec_pwm_device *pwm_to_cros_ec_pwm(struct pwm_chip *chip)
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{
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return container_of(chip, struct cros_ec_pwm_device, chip);
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}
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static int cros_ec_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct cros_ec_pwm *channel;
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channel = kzalloc(sizeof(*channel), GFP_KERNEL);
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if (!channel)
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return -ENOMEM;
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pwm_set_chip_data(pwm, channel);
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return 0;
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}
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static void cros_ec_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct cros_ec_pwm *channel = pwm_get_chip_data(pwm);
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kfree(channel);
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}
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static int cros_ec_dt_type_to_pwm_type(u8 dt_index, u8 *pwm_type)
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{
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switch (dt_index) {
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case CROS_EC_PWM_DT_KB_LIGHT:
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*pwm_type = EC_PWM_TYPE_KB_LIGHT;
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return 0;
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case CROS_EC_PWM_DT_DISPLAY_LIGHT:
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*pwm_type = EC_PWM_TYPE_DISPLAY_LIGHT;
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return 0;
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default:
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return -EINVAL;
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}
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}
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static int cros_ec_pwm_set_duty(struct cros_ec_pwm_device *ec_pwm, u8 index,
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u16 duty)
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{
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struct cros_ec_device *ec = ec_pwm->ec;
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struct {
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struct cros_ec_command msg;
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struct ec_params_pwm_set_duty params;
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} __packed buf;
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struct ec_params_pwm_set_duty *params = &buf.params;
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struct cros_ec_command *msg = &buf.msg;
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int ret;
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memset(&buf, 0, sizeof(buf));
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msg->version = 0;
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msg->command = EC_CMD_PWM_SET_DUTY;
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msg->insize = 0;
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msg->outsize = sizeof(*params);
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params->duty = duty;
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if (ec_pwm->use_pwm_type) {
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ret = cros_ec_dt_type_to_pwm_type(index, ¶ms->pwm_type);
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if (ret) {
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dev_err(ec->dev, "Invalid PWM type index: %d\n", index);
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return ret;
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}
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params->index = 0;
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} else {
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params->pwm_type = EC_PWM_TYPE_GENERIC;
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params->index = index;
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}
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return cros_ec_cmd_xfer_status(ec, msg);
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}
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static int cros_ec_pwm_get_duty(struct cros_ec_pwm_device *ec_pwm, u8 index)
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{
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struct cros_ec_device *ec = ec_pwm->ec;
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struct {
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struct cros_ec_command msg;
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union {
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struct ec_params_pwm_get_duty params;
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struct ec_response_pwm_get_duty resp;
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};
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} __packed buf;
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struct ec_params_pwm_get_duty *params = &buf.params;
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struct ec_response_pwm_get_duty *resp = &buf.resp;
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struct cros_ec_command *msg = &buf.msg;
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int ret;
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memset(&buf, 0, sizeof(buf));
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msg->version = 0;
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msg->command = EC_CMD_PWM_GET_DUTY;
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msg->insize = sizeof(*resp);
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msg->outsize = sizeof(*params);
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if (ec_pwm->use_pwm_type) {
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ret = cros_ec_dt_type_to_pwm_type(index, ¶ms->pwm_type);
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if (ret) {
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dev_err(ec->dev, "Invalid PWM type index: %d\n", index);
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return ret;
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}
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params->index = 0;
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} else {
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params->pwm_type = EC_PWM_TYPE_GENERIC;
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params->index = index;
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}
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ret = cros_ec_cmd_xfer_status(ec, msg);
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if (ret < 0)
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return ret;
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return resp->duty;
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}
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static int cros_ec_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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const struct pwm_state *state)
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{
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struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip);
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struct cros_ec_pwm *channel = pwm_get_chip_data(pwm);
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u16 duty_cycle;
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int ret;
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/* The EC won't let us change the period */
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if (state->period != EC_PWM_MAX_DUTY)
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return -EINVAL;
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if (state->polarity != PWM_POLARITY_NORMAL)
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return -EINVAL;
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/*
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* EC doesn't separate the concept of duty cycle and enabled, but
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* kernel does. Translate.
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*/
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duty_cycle = state->enabled ? state->duty_cycle : 0;
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ret = cros_ec_pwm_set_duty(ec_pwm, pwm->hwpwm, duty_cycle);
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if (ret < 0)
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return ret;
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channel->duty_cycle = state->duty_cycle;
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return 0;
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}
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static int cros_ec_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
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struct pwm_state *state)
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{
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struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip);
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struct cros_ec_pwm *channel = pwm_get_chip_data(pwm);
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int ret;
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ret = cros_ec_pwm_get_duty(ec_pwm, pwm->hwpwm);
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if (ret < 0) {
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dev_err(chip->dev, "error getting initial duty: %d\n", ret);
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return ret;
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}
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state->enabled = (ret > 0);
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state->period = EC_PWM_MAX_DUTY;
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state->polarity = PWM_POLARITY_NORMAL;
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/*
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* Note that "disabled" and "duty cycle == 0" are treated the same. If
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* the cached duty cycle is not zero, used the cached duty cycle. This
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* ensures that the configured duty cycle is kept across a disable and
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* enable operation and avoids potentially confusing consumers.
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*
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* For the case of the initial hardware readout, channel->duty_cycle
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* will be 0 and the actual duty cycle read from the EC is used.
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*/
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if (ret == 0 && channel->duty_cycle > 0)
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state->duty_cycle = channel->duty_cycle;
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else
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state->duty_cycle = ret;
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return 0;
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}
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static struct pwm_device *
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cros_ec_pwm_xlate(struct pwm_chip *chip, const struct of_phandle_args *args)
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{
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struct pwm_device *pwm;
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if (args->args[0] >= chip->npwm)
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return ERR_PTR(-EINVAL);
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pwm = pwm_request_from_chip(chip, args->args[0], NULL);
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if (IS_ERR(pwm))
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return pwm;
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/* The EC won't let us change the period */
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pwm->args.period = EC_PWM_MAX_DUTY;
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return pwm;
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}
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static const struct pwm_ops cros_ec_pwm_ops = {
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.request = cros_ec_pwm_request,
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.free = cros_ec_pwm_free,
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.get_state = cros_ec_pwm_get_state,
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.apply = cros_ec_pwm_apply,
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.owner = THIS_MODULE,
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};
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/*
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* Determine the number of supported PWMs. The EC does not return the number
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* of PWMs it supports directly, so we have to read the pwm duty cycle for
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* subsequent channels until we get an error.
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*/
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static int cros_ec_num_pwms(struct cros_ec_pwm_device *ec_pwm)
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{
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int i, ret;
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/* The index field is only 8 bits */
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for (i = 0; i <= U8_MAX; i++) {
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ret = cros_ec_pwm_get_duty(ec_pwm, i);
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/*
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* We look for SUCCESS, INVALID_COMMAND, or INVALID_PARAM
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* responses; everything else is treated as an error.
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* The EC error codes map to -EOPNOTSUPP and -EINVAL,
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* so check for those.
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*/
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switch (ret) {
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case -EOPNOTSUPP: /* invalid command */
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return -ENODEV;
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case -EINVAL: /* invalid parameter */
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return i;
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default:
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if (ret < 0)
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return ret;
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break;
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}
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}
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return U8_MAX;
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}
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static int cros_ec_pwm_probe(struct platform_device *pdev)
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{
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struct cros_ec_device *ec = dev_get_drvdata(pdev->dev.parent);
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struct device *dev = &pdev->dev;
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struct device_node *np = pdev->dev.of_node;
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struct cros_ec_pwm_device *ec_pwm;
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struct pwm_chip *chip;
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int ret;
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if (!ec) {
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dev_err(dev, "no parent EC device\n");
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return -EINVAL;
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}
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ec_pwm = devm_kzalloc(dev, sizeof(*ec_pwm), GFP_KERNEL);
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if (!ec_pwm)
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return -ENOMEM;
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chip = &ec_pwm->chip;
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ec_pwm->ec = ec;
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if (of_device_is_compatible(np, "google,cros-ec-pwm-type"))
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ec_pwm->use_pwm_type = true;
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/* PWM chip */
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chip->dev = dev;
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chip->ops = &cros_ec_pwm_ops;
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chip->of_xlate = cros_ec_pwm_xlate;
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chip->of_pwm_n_cells = 1;
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if (ec_pwm->use_pwm_type) {
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chip->npwm = CROS_EC_PWM_DT_COUNT;
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} else {
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ret = cros_ec_num_pwms(ec_pwm);
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if (ret < 0) {
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dev_err(dev, "Couldn't find PWMs: %d\n", ret);
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return ret;
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}
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chip->npwm = ret;
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}
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dev_dbg(dev, "Probed %u PWMs\n", chip->npwm);
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ret = pwmchip_add(chip);
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if (ret < 0) {
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dev_err(dev, "cannot register PWM: %d\n", ret);
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return ret;
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}
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platform_set_drvdata(pdev, ec_pwm);
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return ret;
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}
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static void cros_ec_pwm_remove(struct platform_device *dev)
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{
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struct cros_ec_pwm_device *ec_pwm = platform_get_drvdata(dev);
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struct pwm_chip *chip = &ec_pwm->chip;
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pwmchip_remove(chip);
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}
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#ifdef CONFIG_OF
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static const struct of_device_id cros_ec_pwm_of_match[] = {
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{ .compatible = "google,cros-ec-pwm" },
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{ .compatible = "google,cros-ec-pwm-type" },
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{},
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};
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MODULE_DEVICE_TABLE(of, cros_ec_pwm_of_match);
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#endif
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static struct platform_driver cros_ec_pwm_driver = {
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.probe = cros_ec_pwm_probe,
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.remove_new = cros_ec_pwm_remove,
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.driver = {
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.name = "cros-ec-pwm",
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.of_match_table = of_match_ptr(cros_ec_pwm_of_match),
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},
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};
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module_platform_driver(cros_ec_pwm_driver);
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MODULE_ALIAS("platform:cros-ec-pwm");
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MODULE_DESCRIPTION("ChromeOS EC PWM driver");
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MODULE_LICENSE("GPL v2");
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