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![Kuninori Morimoto](/assets/img/avatar_default.png)
We have devm_xxx version of snd_dmaengine_pcm_register, let's use it. This patch also removes related empty functions Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
91 lines
2.7 KiB
C
91 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* at91-pcm.h - ALSA PCM interface for the Atmel AT91 SoC.
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*
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* Copyright (C) 2005 SAN People
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* Copyright (C) 2008 Atmel
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*
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* Authors: Sedji Gaouaou <sedji.gaouaou@atmel.com>
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*
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* Based on at91-pcm. by:
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* Frank Mandarino <fmandarino@endrelia.com>
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* Copyright 2006 Endrelia Technologies Inc.
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*
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* Based on pxa2xx-pcm.c by:
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*
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* Author: Nicolas Pitre
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* Created: Nov 30, 2004
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* Copyright: (C) 2004 MontaVista Software, Inc.
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*/
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#ifndef _ATMEL_PCM_H
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#define _ATMEL_PCM_H
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#include <linux/atmel-ssc.h>
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#define ATMEL_SSC_DMABUF_SIZE (64 * 1024)
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/*
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* Registers and status bits that are required by the PCM driver.
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*/
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struct atmel_pdc_regs {
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unsigned int xpr; /* PDC recv/trans pointer */
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unsigned int xcr; /* PDC recv/trans counter */
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unsigned int xnpr; /* PDC next recv/trans pointer */
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unsigned int xncr; /* PDC next recv/trans counter */
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unsigned int ptcr; /* PDC transfer control */
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};
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struct atmel_ssc_mask {
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u32 ssc_enable; /* SSC recv/trans enable */
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u32 ssc_disable; /* SSC recv/trans disable */
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u32 ssc_error; /* SSC error conditions */
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u32 ssc_endx; /* SSC ENDTX or ENDRX */
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u32 ssc_endbuf; /* SSC TXBUFE or RXBUFF */
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u32 pdc_enable; /* PDC recv/trans enable */
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u32 pdc_disable; /* PDC recv/trans disable */
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};
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/*
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* This structure, shared between the PCM driver and the interface,
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* contains all information required by the PCM driver to perform the
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* PDC DMA operation. All fields except dma_intr_handler() are initialized
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* by the interface. The dma_intr_handler() pointer is set by the PCM
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* driver and called by the interface SSC interrupt handler if it is
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* non-NULL.
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*/
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struct atmel_pcm_dma_params {
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char *name; /* stream identifier */
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int pdc_xfer_size; /* PDC counter increment in bytes */
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struct ssc_device *ssc; /* SSC device for stream */
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struct atmel_pdc_regs *pdc; /* PDC receive or transmit registers */
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struct atmel_ssc_mask *mask; /* SSC & PDC status bits */
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struct snd_pcm_substream *substream;
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void (*dma_intr_handler)(u32, struct snd_pcm_substream *);
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};
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/*
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* SSC register access (since ssc_writel() / ssc_readl() require literal name)
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*/
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#define ssc_readx(base, reg) (__raw_readl((base) + (reg)))
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#define ssc_writex(base, reg, value) __raw_writel((value), (base) + (reg))
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#if IS_ENABLED(CONFIG_SND_ATMEL_SOC_PDC)
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int atmel_pcm_pdc_platform_register(struct device *dev);
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#else
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static inline int atmel_pcm_pdc_platform_register(struct device *dev)
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{
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return 0;
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}
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#endif
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#if IS_ENABLED(CONFIG_SND_ATMEL_SOC_DMA)
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int atmel_pcm_dma_platform_register(struct device *dev);
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#else
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static inline int atmel_pcm_dma_platform_register(struct device *dev)
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{
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return 0;
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}
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#endif
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#endif /* _ATMEL_PCM_H */
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