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![Zhang Rui](/assets/img/avatar_default.png)
On multi-function JMicron SATA/PATA/AHCI devices, the PATA controller at function 1 doesn't work if it is powered on before the SATA controller at function 0. The result is that PATA doesn't work after resume, and we print messages like this: pata_jmicron 0000:02:00.1: Refused to change power state, currently in D3 irq 17: nobody cared (try booting with the "irqpoll" option) Async resume was introduced in v3.15 by76569faa62
("PM / sleep: Asynchronous threads for resume_noirq"). Prior to that, we powered on the functions in order, so this problem shouldn't happen.e6b7e41cdd
("ata: Disabling the async PM for JMicron chip 363/361") solved the problem for JMicron 361 and 363 devices. With async suspend disabled, we always power on function 0 before function 1. Barto then reported the same problem with a JMicron 368 (see comment #57 in the bugzilla). Rather than extending the blacklist piecemeal, disable async suspend for all JMicron multi-function SATA/PATA/AHCI devices. This quirk could stay in the ahci and pata_jmicron drivers, but it's likely the problem will occur even if pata_jmicron isn't loaded until after the suspend/resume. Making it a PCI quirk ensures that we'll preserve the power-on order even if the drivers aren't loaded. [bhelgaas: changelog, limit to multi-function, limit to IDE/ATA] Link: https://bugzilla.kernel.org/show_bug.cgi?id=81551 Reported-and-tested-by: Barto <mister.freeman@laposte.net> Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v3.15+
173 lines
4.4 KiB
C
173 lines
4.4 KiB
C
/*
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* pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the
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* PATA port of the controller. The SATA ports are
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* driven by AHCI in the usual configuration although
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* this driver can handle other setups if we need it.
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*
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* (c) 2006 Red Hat
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#include <linux/ata.h>
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#define DRV_NAME "pata_jmicron"
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#define DRV_VERSION "0.1.5"
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typedef enum {
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PORT_PATA0 = 0,
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PORT_PATA1 = 1,
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PORT_SATA = 2,
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} port_type;
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/**
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* jmicron_pre_reset - check for 40/80 pin
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* @link: ATA link
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* @deadline: deadline jiffies for the operation
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*
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* Perform the PATA port setup we need.
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*
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* On the Jmicron 361/363 there is a single PATA port that can be mapped
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* either as primary or secondary (or neither). We don't do any policy
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* and setup here. We assume that has been done by init_one and the
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* BIOS.
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*/
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static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline)
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{
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struct ata_port *ap = link->ap;
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u32 control;
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u32 control5;
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int port_mask = 1<< (4 * ap->port_no);
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int port = ap->port_no;
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port_type port_map[2];
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/* Check if our port is enabled */
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pci_read_config_dword(pdev, 0x40, &control);
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if ((control & port_mask) == 0)
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return -ENOENT;
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/* There are two basic mappings. One has the two SATA ports merged
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as master/slave and the secondary as PATA, the other has only the
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SATA port mapped */
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if (control & (1 << 23)) {
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port_map[0] = PORT_SATA;
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port_map[1] = PORT_PATA0;
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} else {
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port_map[0] = PORT_SATA;
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port_map[1] = PORT_SATA;
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}
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/* The 365/366 may have this bit set to map the second PATA port
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as the internal primary channel */
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pci_read_config_dword(pdev, 0x80, &control5);
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if (control5 & (1<<24))
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port_map[0] = PORT_PATA1;
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/* The two ports may then be logically swapped by the firmware */
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if (control & (1 << 22))
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port = port ^ 1;
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/*
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* Now we know which physical port we are talking about we can
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* actually do our cable checking etc. Thankfully we don't need
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* to do the plumbing for other cases.
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*/
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switch (port_map[port]) {
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case PORT_PATA0:
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if ((control & (1 << 5)) == 0)
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return -ENOENT;
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if (control & (1 << 3)) /* 40/80 pin primary */
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ap->cbl = ATA_CBL_PATA40;
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else
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ap->cbl = ATA_CBL_PATA80;
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break;
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case PORT_PATA1:
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/* Bit 21 is set if the port is enabled */
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if ((control5 & (1 << 21)) == 0)
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return -ENOENT;
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if (control5 & (1 << 19)) /* 40/80 pin secondary */
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ap->cbl = ATA_CBL_PATA40;
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else
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ap->cbl = ATA_CBL_PATA80;
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break;
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case PORT_SATA:
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ap->cbl = ATA_CBL_SATA;
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break;
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}
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return ata_sff_prereset(link, deadline);
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}
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/* No PIO or DMA methods needed for this device */
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static struct scsi_host_template jmicron_sht = {
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ATA_BMDMA_SHT(DRV_NAME),
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};
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static struct ata_port_operations jmicron_ops = {
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.inherits = &ata_bmdma_port_ops,
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.prereset = jmicron_pre_reset,
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};
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/**
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* jmicron_init_one - Register Jmicron ATA PCI device with kernel services
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* @pdev: PCI device to register
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* @ent: Entry in jmicron_pci_tbl matching with @pdev
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*
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* Called from kernel PCI layer.
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*
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* LOCKING:
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* Inherited from PCI layer (may sleep).
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*
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* RETURNS:
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* Zero on success, or -ERRNO value.
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*/
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static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
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{
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static const struct ata_port_info info = {
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.flags = ATA_FLAG_SLAVE_POSS,
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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.udma_mask = ATA_UDMA5,
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.port_ops = &jmicron_ops,
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};
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const struct ata_port_info *ppi[] = { &info, NULL };
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return ata_pci_bmdma_init_one(pdev, ppi, &jmicron_sht, NULL, 0);
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}
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static const struct pci_device_id jmicron_pci_tbl[] = {
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{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
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{ } /* terminate list */
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};
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static struct pci_driver jmicron_pci_driver = {
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.name = DRV_NAME,
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.id_table = jmicron_pci_tbl,
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.probe = jmicron_init_one,
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.remove = ata_pci_remove_one,
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#ifdef CONFIG_PM_SLEEP
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.suspend = ata_pci_device_suspend,
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.resume = ata_pci_device_resume,
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#endif
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};
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module_pci_driver(jmicron_pci_driver);
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("SCSI low-level driver for Jmicron PATA ports");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl);
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MODULE_VERSION(DRV_VERSION);
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