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![]() Add a clock driver for the Stratix10 SoC. The driver is similar to the Cyclone5/Arria10 platforms, with the exception that this driver only uses one single clock binding. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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.. | ||
clk-gate-a10.c | ||
clk-gate-s10.c | ||
clk-gate.c | ||
clk-periph-a10.c | ||
clk-periph-s10.c | ||
clk-periph.c | ||
clk-pll-a10.c | ||
clk-pll-s10.c | ||
clk-pll.c | ||
clk-s10.c | ||
clk.c | ||
clk.h | ||
Makefile | ||
stratix10-clk.h |