mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-27 11:19:37 +00:00
![Linus Torvalds](/assets/img/avatar_default.png)
- VHE optimizations - EL2 address space randomization - speculative execution mitigations ("variant 3a", aka execution past invalid privilege register access) - bugfixes and cleanups PPC: - improvements for the radix page fault handler for HV KVM on POWER9 s390: - more kvm stat counters - virtio gpu plumbing - documentation - facilities improvements x86: - support for VMware magic I/O port and pseudo-PMCs - AMD pause loop exiting - support for AMD core performance extensions - support for synchronous register access - expose nVMX capabilities to userspace - support for Hyper-V signaling via eventfd - use Enlightened VMCS when running on Hyper-V - allow userspace to disable MWAIT/HLT/PAUSE vmexits - usual roundup of optimizations and nested virtualization bugfixes Generic: - API selftest infrastructure (though the only tests are for x86 as of now) -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJay19UAAoJEL/70l94x66DGKYIAIu9PTHAEwaX0et15fPW5y2x rrtS355lSAmMrPJ1nePRQ+rProD/1B0Kizj3/9O+B9OTKKRsorRYNa4CSu9neO2k N3rdE46M1wHAPwuJPcYvh3iBVXtgbMayk1EK5aVoSXaMXEHh+PWZextkl+F+G853 kC27yDy30jj9pStwnEFSBszO9ua/URdKNKBATNx8WUP6d9U/dlfm5xv3Dc3WtKt2 UMGmog2wh0i7ecXo7hRkMK4R7OYP3ZxAexq5aa9BOPuFp+ZdzC/MVpN+jsjq2J/M Zq6RNyA2HFyQeP0E9QgFsYS2BNOPeLZnT5Jg1z4jyiD32lAZ/iC51zwm4oNKcDM= =bPlD -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull kvm updates from Paolo Bonzini: "ARM: - VHE optimizations - EL2 address space randomization - speculative execution mitigations ("variant 3a", aka execution past invalid privilege register access) - bugfixes and cleanups PPC: - improvements for the radix page fault handler for HV KVM on POWER9 s390: - more kvm stat counters - virtio gpu plumbing - documentation - facilities improvements x86: - support for VMware magic I/O port and pseudo-PMCs - AMD pause loop exiting - support for AMD core performance extensions - support for synchronous register access - expose nVMX capabilities to userspace - support for Hyper-V signaling via eventfd - use Enlightened VMCS when running on Hyper-V - allow userspace to disable MWAIT/HLT/PAUSE vmexits - usual roundup of optimizations and nested virtualization bugfixes Generic: - API selftest infrastructure (though the only tests are for x86 as of now)" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (174 commits) kvm: x86: fix a prototype warning kvm: selftests: add sync_regs_test kvm: selftests: add API testing infrastructure kvm: x86: fix a compile warning KVM: X86: Add Force Emulation Prefix for "emulate the next instruction" KVM: X86: Introduce handle_ud() KVM: vmx: unify adjacent #ifdefs x86: kvm: hide the unused 'cpu' variable KVM: VMX: remove bogus WARN_ON in handle_ept_misconfig Revert "KVM: X86: Fix SMRAM accessing even if VM is shutdown" kvm: Add emulation for movups/movupd KVM: VMX: raise internal error for exception during invalid protected mode state KVM: nVMX: Optimization: Dont set KVM_REQ_EVENT when VMExit with nested_run_pending KVM: nVMX: Require immediate-exit when event reinjected to L2 and L1 event pending KVM: x86: Fix misleading comments on handling pending exceptions KVM: x86: Rename interrupt.pending to interrupt.injected KVM: VMX: No need to clear pending NMI/interrupt on inject realmode interrupt x86/kvm: use Enlightened VMCS when running on Hyper-V x86/hyper-v: detect nested features x86/hyper-v: define struct hv_enlightened_vmcs and clean field bits ...
436 lines
11 KiB
C
436 lines
11 KiB
C
/*
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* Copyright (c) 2009, Microsoft Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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* Place - Suite 330, Boston, MA 02111-1307 USA.
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*
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* Authors:
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* Haiyang Zhang <haiyangz@microsoft.com>
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* Hank Janssen <hjanssen@microsoft.com>
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*
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include <linux/hyperv.h>
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#include <linux/version.h>
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#include <linux/random.h>
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#include <linux/clockchips.h>
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#include <asm/mshyperv.h>
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#include "hyperv_vmbus.h"
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/* The one and only */
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struct hv_context hv_context = {
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.synic_initialized = false,
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};
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/*
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* If false, we're using the old mechanism for stimer0 interrupts
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* where it sends a VMbus message when it expires. The old
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* mechanism is used when running on older versions of Hyper-V
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* that don't support Direct Mode. While Hyper-V provides
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* four stimer's per CPU, Linux uses only stimer0.
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*/
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static bool direct_mode_enabled;
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static int stimer0_irq;
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static int stimer0_vector;
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#define HV_TIMER_FREQUENCY (10 * 1000 * 1000) /* 100ns period */
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#define HV_MAX_MAX_DELTA_TICKS 0xffffffff
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#define HV_MIN_DELTA_TICKS 1
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/*
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* hv_init - Main initialization routine.
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*
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* This routine must be called before any other routines in here are called
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*/
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int hv_init(void)
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{
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hv_context.cpu_context = alloc_percpu(struct hv_per_cpu_context);
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if (!hv_context.cpu_context)
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return -ENOMEM;
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direct_mode_enabled = ms_hyperv.misc_features &
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HV_X64_STIMER_DIRECT_MODE_AVAILABLE;
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return 0;
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}
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/*
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* hv_post_message - Post a message using the hypervisor message IPC.
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*
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* This involves a hypercall.
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*/
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int hv_post_message(union hv_connection_id connection_id,
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enum hv_message_type message_type,
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void *payload, size_t payload_size)
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{
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struct hv_input_post_message *aligned_msg;
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struct hv_per_cpu_context *hv_cpu;
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u64 status;
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if (payload_size > HV_MESSAGE_PAYLOAD_BYTE_COUNT)
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return -EMSGSIZE;
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hv_cpu = get_cpu_ptr(hv_context.cpu_context);
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aligned_msg = hv_cpu->post_msg_page;
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aligned_msg->connectionid = connection_id;
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aligned_msg->reserved = 0;
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aligned_msg->message_type = message_type;
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aligned_msg->payload_size = payload_size;
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memcpy((void *)aligned_msg->payload, payload, payload_size);
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status = hv_do_hypercall(HVCALL_POST_MESSAGE, aligned_msg, NULL);
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/* Preemption must remain disabled until after the hypercall
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* so some other thread can't get scheduled onto this cpu and
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* corrupt the per-cpu post_msg_page
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*/
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put_cpu_ptr(hv_cpu);
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return status & 0xFFFF;
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}
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/*
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* ISR for when stimer0 is operating in Direct Mode. Direct Mode
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* does not use VMbus or any VMbus messages, so process here and not
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* in the VMbus driver code.
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*/
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static void hv_stimer0_isr(void)
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{
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struct hv_per_cpu_context *hv_cpu;
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hv_cpu = this_cpu_ptr(hv_context.cpu_context);
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hv_cpu->clk_evt->event_handler(hv_cpu->clk_evt);
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add_interrupt_randomness(stimer0_vector, 0);
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}
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static int hv_ce_set_next_event(unsigned long delta,
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struct clock_event_device *evt)
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{
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u64 current_tick;
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WARN_ON(!clockevent_state_oneshot(evt));
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current_tick = hyperv_cs->read(NULL);
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current_tick += delta;
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hv_init_timer(HV_X64_MSR_STIMER0_COUNT, current_tick);
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return 0;
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}
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static int hv_ce_shutdown(struct clock_event_device *evt)
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{
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hv_init_timer(HV_X64_MSR_STIMER0_COUNT, 0);
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hv_init_timer_config(HV_X64_MSR_STIMER0_CONFIG, 0);
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if (direct_mode_enabled)
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hv_disable_stimer0_percpu_irq(stimer0_irq);
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return 0;
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}
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static int hv_ce_set_oneshot(struct clock_event_device *evt)
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{
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union hv_timer_config timer_cfg;
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timer_cfg.as_uint64 = 0;
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timer_cfg.enable = 1;
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timer_cfg.auto_enable = 1;
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if (direct_mode_enabled) {
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/*
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* When it expires, the timer will directly interrupt
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* on the specified hardware vector/IRQ.
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*/
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timer_cfg.direct_mode = 1;
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timer_cfg.apic_vector = stimer0_vector;
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hv_enable_stimer0_percpu_irq(stimer0_irq);
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} else {
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/*
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* When it expires, the timer will generate a VMbus message,
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* to be handled by the normal VMbus interrupt handler.
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*/
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timer_cfg.direct_mode = 0;
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timer_cfg.sintx = VMBUS_MESSAGE_SINT;
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}
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hv_init_timer_config(HV_X64_MSR_STIMER0_CONFIG, timer_cfg.as_uint64);
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return 0;
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}
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static void hv_init_clockevent_device(struct clock_event_device *dev, int cpu)
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{
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dev->name = "Hyper-V clockevent";
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dev->features = CLOCK_EVT_FEAT_ONESHOT;
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dev->cpumask = cpumask_of(cpu);
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dev->rating = 1000;
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/*
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* Avoid settint dev->owner = THIS_MODULE deliberately as doing so will
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* result in clockevents_config_and_register() taking additional
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* references to the hv_vmbus module making it impossible to unload.
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*/
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dev->set_state_shutdown = hv_ce_shutdown;
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dev->set_state_oneshot = hv_ce_set_oneshot;
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dev->set_next_event = hv_ce_set_next_event;
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}
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int hv_synic_alloc(void)
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{
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int cpu;
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hv_context.hv_numa_map = kzalloc(sizeof(struct cpumask) * nr_node_ids,
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GFP_KERNEL);
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if (hv_context.hv_numa_map == NULL) {
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pr_err("Unable to allocate NUMA map\n");
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goto err;
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}
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for_each_present_cpu(cpu) {
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struct hv_per_cpu_context *hv_cpu
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= per_cpu_ptr(hv_context.cpu_context, cpu);
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memset(hv_cpu, 0, sizeof(*hv_cpu));
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tasklet_init(&hv_cpu->msg_dpc,
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vmbus_on_msg_dpc, (unsigned long) hv_cpu);
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hv_cpu->clk_evt = kzalloc(sizeof(struct clock_event_device),
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GFP_KERNEL);
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if (hv_cpu->clk_evt == NULL) {
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pr_err("Unable to allocate clock event device\n");
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goto err;
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}
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hv_init_clockevent_device(hv_cpu->clk_evt, cpu);
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hv_cpu->synic_message_page =
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(void *)get_zeroed_page(GFP_ATOMIC);
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if (hv_cpu->synic_message_page == NULL) {
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pr_err("Unable to allocate SYNIC message page\n");
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goto err;
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}
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hv_cpu->synic_event_page = (void *)get_zeroed_page(GFP_ATOMIC);
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if (hv_cpu->synic_event_page == NULL) {
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pr_err("Unable to allocate SYNIC event page\n");
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goto err;
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}
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hv_cpu->post_msg_page = (void *)get_zeroed_page(GFP_ATOMIC);
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if (hv_cpu->post_msg_page == NULL) {
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pr_err("Unable to allocate post msg page\n");
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goto err;
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}
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INIT_LIST_HEAD(&hv_cpu->chan_list);
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}
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if (direct_mode_enabled &&
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hv_setup_stimer0_irq(&stimer0_irq, &stimer0_vector,
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hv_stimer0_isr))
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goto err;
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return 0;
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err:
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return -ENOMEM;
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}
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void hv_synic_free(void)
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{
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int cpu;
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for_each_present_cpu(cpu) {
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struct hv_per_cpu_context *hv_cpu
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= per_cpu_ptr(hv_context.cpu_context, cpu);
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if (hv_cpu->synic_event_page)
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free_page((unsigned long)hv_cpu->synic_event_page);
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if (hv_cpu->synic_message_page)
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free_page((unsigned long)hv_cpu->synic_message_page);
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if (hv_cpu->post_msg_page)
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free_page((unsigned long)hv_cpu->post_msg_page);
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}
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kfree(hv_context.hv_numa_map);
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}
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/*
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* hv_synic_init - Initialize the Synthetic Interrupt Controller.
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*
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* If it is already initialized by another entity (ie x2v shim), we need to
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* retrieve the initialized message and event pages. Otherwise, we create and
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* initialize the message and event pages.
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*/
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int hv_synic_init(unsigned int cpu)
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{
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struct hv_per_cpu_context *hv_cpu
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= per_cpu_ptr(hv_context.cpu_context, cpu);
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union hv_synic_simp simp;
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union hv_synic_siefp siefp;
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union hv_synic_sint shared_sint;
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union hv_synic_scontrol sctrl;
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/* Setup the Synic's message page */
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hv_get_simp(simp.as_uint64);
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simp.simp_enabled = 1;
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simp.base_simp_gpa = virt_to_phys(hv_cpu->synic_message_page)
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>> PAGE_SHIFT;
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hv_set_simp(simp.as_uint64);
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/* Setup the Synic's event page */
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hv_get_siefp(siefp.as_uint64);
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siefp.siefp_enabled = 1;
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siefp.base_siefp_gpa = virt_to_phys(hv_cpu->synic_event_page)
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>> PAGE_SHIFT;
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hv_set_siefp(siefp.as_uint64);
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/* Setup the shared SINT. */
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hv_get_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT,
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shared_sint.as_uint64);
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shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR;
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shared_sint.masked = false;
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if (ms_hyperv.hints & HV_X64_DEPRECATING_AEOI_RECOMMENDED)
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shared_sint.auto_eoi = false;
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else
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shared_sint.auto_eoi = true;
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hv_set_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT,
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shared_sint.as_uint64);
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/* Enable the global synic bit */
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hv_get_synic_state(sctrl.as_uint64);
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sctrl.enable = 1;
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hv_set_synic_state(sctrl.as_uint64);
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hv_context.synic_initialized = true;
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/*
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* Register the per-cpu clockevent source.
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*/
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if (ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE)
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clockevents_config_and_register(hv_cpu->clk_evt,
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HV_TIMER_FREQUENCY,
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HV_MIN_DELTA_TICKS,
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HV_MAX_MAX_DELTA_TICKS);
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return 0;
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}
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/*
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* hv_synic_clockevents_cleanup - Cleanup clockevent devices
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*/
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void hv_synic_clockevents_cleanup(void)
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{
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int cpu;
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if (!(ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE))
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return;
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if (direct_mode_enabled)
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hv_remove_stimer0_irq(stimer0_irq);
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for_each_present_cpu(cpu) {
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struct hv_per_cpu_context *hv_cpu
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= per_cpu_ptr(hv_context.cpu_context, cpu);
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clockevents_unbind_device(hv_cpu->clk_evt, cpu);
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}
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}
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/*
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* hv_synic_cleanup - Cleanup routine for hv_synic_init().
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*/
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int hv_synic_cleanup(unsigned int cpu)
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{
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union hv_synic_sint shared_sint;
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union hv_synic_simp simp;
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union hv_synic_siefp siefp;
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union hv_synic_scontrol sctrl;
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struct vmbus_channel *channel, *sc;
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bool channel_found = false;
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unsigned long flags;
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if (!hv_context.synic_initialized)
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return -EFAULT;
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/*
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* Search for channels which are bound to the CPU we're about to
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* cleanup. In case we find one and vmbus is still connected we need to
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* fail, this will effectively prevent CPU offlining. There is no way
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* we can re-bind channels to different CPUs for now.
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*/
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mutex_lock(&vmbus_connection.channel_mutex);
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list_for_each_entry(channel, &vmbus_connection.chn_list, listentry) {
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if (channel->target_cpu == cpu) {
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channel_found = true;
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break;
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}
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spin_lock_irqsave(&channel->lock, flags);
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list_for_each_entry(sc, &channel->sc_list, sc_list) {
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if (sc->target_cpu == cpu) {
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channel_found = true;
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break;
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}
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}
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spin_unlock_irqrestore(&channel->lock, flags);
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if (channel_found)
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break;
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}
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mutex_unlock(&vmbus_connection.channel_mutex);
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if (channel_found && vmbus_connection.conn_state == CONNECTED)
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return -EBUSY;
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/* Turn off clockevent device */
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if (ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE) {
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struct hv_per_cpu_context *hv_cpu
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= this_cpu_ptr(hv_context.cpu_context);
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clockevents_unbind_device(hv_cpu->clk_evt, cpu);
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hv_ce_shutdown(hv_cpu->clk_evt);
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put_cpu_ptr(hv_cpu);
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}
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hv_get_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT,
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shared_sint.as_uint64);
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shared_sint.masked = 1;
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/* Need to correctly cleanup in the case of SMP!!! */
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/* Disable the interrupt */
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hv_set_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT,
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shared_sint.as_uint64);
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hv_get_simp(simp.as_uint64);
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simp.simp_enabled = 0;
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simp.base_simp_gpa = 0;
|
|
|
|
hv_set_simp(simp.as_uint64);
|
|
|
|
hv_get_siefp(siefp.as_uint64);
|
|
siefp.siefp_enabled = 0;
|
|
siefp.base_siefp_gpa = 0;
|
|
|
|
hv_set_siefp(siefp.as_uint64);
|
|
|
|
/* Disable the global synic bit */
|
|
hv_get_synic_state(sctrl.as_uint64);
|
|
sctrl.enable = 0;
|
|
hv_set_synic_state(sctrl.as_uint64);
|
|
|
|
return 0;
|
|
}
|