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![Lucas Stach](/assets/img/avatar_default.png)
This is the only part of the scheduler which must not be called from different drivers. Move it to module init/exit so it is done a single time when loading the scheduler. Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
173 lines
5.5 KiB
C
173 lines
5.5 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _DRM_GPU_SCHEDULER_H_
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#define _DRM_GPU_SCHEDULER_H_
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#include <drm/spsc_queue.h>
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#include <linux/dma-fence.h>
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struct drm_gpu_scheduler;
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struct drm_sched_rq;
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enum drm_sched_priority {
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DRM_SCHED_PRIORITY_MIN,
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DRM_SCHED_PRIORITY_LOW = DRM_SCHED_PRIORITY_MIN,
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DRM_SCHED_PRIORITY_NORMAL,
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DRM_SCHED_PRIORITY_HIGH_SW,
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DRM_SCHED_PRIORITY_HIGH_HW,
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DRM_SCHED_PRIORITY_KERNEL,
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DRM_SCHED_PRIORITY_MAX,
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DRM_SCHED_PRIORITY_INVALID = -1,
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DRM_SCHED_PRIORITY_UNSET = -2
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};
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/**
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* A scheduler entity is a wrapper around a job queue or a group
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* of other entities. Entities take turns emitting jobs from their
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* job queues to corresponding hardware ring based on scheduling
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* policy.
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*/
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struct drm_sched_entity {
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struct list_head list;
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struct drm_sched_rq *rq;
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spinlock_t rq_lock;
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struct drm_gpu_scheduler *sched;
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spinlock_t queue_lock;
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struct spsc_queue job_queue;
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atomic_t fence_seq;
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uint64_t fence_context;
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struct dma_fence *dependency;
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struct dma_fence_cb cb;
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atomic_t *guilty; /* points to ctx's guilty */
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};
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/**
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* Run queue is a set of entities scheduling command submissions for
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* one specific ring. It implements the scheduling policy that selects
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* the next entity to emit commands from.
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*/
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struct drm_sched_rq {
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spinlock_t lock;
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struct list_head entities;
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struct drm_sched_entity *current_entity;
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};
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struct drm_sched_fence {
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struct dma_fence scheduled;
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struct dma_fence finished;
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struct dma_fence_cb cb;
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struct dma_fence *parent;
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struct drm_gpu_scheduler *sched;
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spinlock_t lock;
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void *owner;
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};
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struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f);
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struct drm_sched_job {
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struct spsc_node queue_node;
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struct drm_gpu_scheduler *sched;
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struct drm_sched_fence *s_fence;
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struct dma_fence_cb finish_cb;
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struct work_struct finish_work;
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struct list_head node;
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struct delayed_work work_tdr;
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uint64_t id;
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atomic_t karma;
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enum drm_sched_priority s_priority;
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};
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static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job,
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int threshold)
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{
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return (s_job && atomic_inc_return(&s_job->karma) > threshold);
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}
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/**
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* Define the backend operations called by the scheduler,
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* these functions should be implemented in driver side
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*/
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struct drm_sched_backend_ops {
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struct dma_fence *(*dependency)(struct drm_sched_job *sched_job,
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struct drm_sched_entity *s_entity);
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struct dma_fence *(*run_job)(struct drm_sched_job *sched_job);
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void (*timedout_job)(struct drm_sched_job *sched_job);
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void (*free_job)(struct drm_sched_job *sched_job);
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};
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/**
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* One scheduler is implemented for each hardware ring
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*/
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struct drm_gpu_scheduler {
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const struct drm_sched_backend_ops *ops;
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uint32_t hw_submission_limit;
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long timeout;
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const char *name;
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struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_MAX];
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wait_queue_head_t wake_up_worker;
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wait_queue_head_t job_scheduled;
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atomic_t hw_rq_count;
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atomic64_t job_id_count;
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struct task_struct *thread;
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struct list_head ring_mirror_list;
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spinlock_t job_list_lock;
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int hang_limit;
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};
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int drm_sched_init(struct drm_gpu_scheduler *sched,
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const struct drm_sched_backend_ops *ops,
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uint32_t hw_submission, unsigned hang_limit, long timeout,
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const char *name);
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void drm_sched_fini(struct drm_gpu_scheduler *sched);
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int drm_sched_entity_init(struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity,
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struct drm_sched_rq *rq,
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uint32_t jobs, atomic_t *guilty);
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void drm_sched_entity_fini(struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity);
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void drm_sched_entity_push_job(struct drm_sched_job *sched_job,
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struct drm_sched_entity *entity);
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void drm_sched_entity_set_rq(struct drm_sched_entity *entity,
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struct drm_sched_rq *rq);
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struct drm_sched_fence *drm_sched_fence_create(
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struct drm_sched_entity *s_entity, void *owner);
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void drm_sched_fence_scheduled(struct drm_sched_fence *fence);
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void drm_sched_fence_finished(struct drm_sched_fence *fence);
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int drm_sched_job_init(struct drm_sched_job *job,
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struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity,
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void *owner);
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void drm_sched_hw_job_reset(struct drm_gpu_scheduler *sched,
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struct drm_sched_job *job);
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void drm_sched_job_recovery(struct drm_gpu_scheduler *sched);
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bool drm_sched_dependency_optimized(struct dma_fence* fence,
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struct drm_sched_entity *entity);
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void drm_sched_job_kickout(struct drm_sched_job *s_job);
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#endif
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