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20a2742e57
The ti-sysc binding does not yet describe the capabilities of the interconnect target module. So to make the ti-sysc binding usable for configuring the interconnect target module, we need to add few more properties: 1. To detect between omap2 and omap4 timers, let's add compatibles for them for "ti,sysc-omap2-timer" and,sysc-omap4-timer". This makes it easier to pick up the already initialized system timers later on 2. Let's add "ti,sysc-mask" for a mask of features supported by the interconnect target module. This describes what we have available in the various SYSCONFIG registers 3. Let's add "ti,sysc-midle" and "ti,sysc-sidle" lists for the master and slave idle modes supported by the interconnect target module. These describe the values available for MIDLE and SIDLE bits in the SYSCONFIG registers 4. Some interconnect target modules need a short delay after reset before they can be accessed, let's use "ti,sysc-delay-us" for that 5. Let's add "ti,syss-mask" bit to describe the optional SYSSTATUS register bits for reset done bits 6. Let's support the two existing custom quirk properties already listed in Documentation/devicetree/bindings/arm/omap/omap.txt for "ti,no-reset-on-init" and "ti,no-idle-on-init" 7. And finally, let's add a header for the binding for the dts files and the driver to use Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Dave Gerlach <d-gerlach@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Suman Anna <s-anna@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
22 lines
796 B
C
22 lines
796 B
C
/* TI sysc interconnect target module defines */
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/* Generic sysc found on omap2 and later, also known as type1 */
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#define SYSC_OMAP2_CLOCKACTIVITY (3 << 8)
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#define SYSC_OMAP2_EMUFREE (1 << 5)
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#define SYSC_OMAP2_ENAWAKEUP (1 << 2)
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#define SYSC_OMAP2_SOFTRESET (1 << 1)
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#define SYSC_OMAP2_AUTOIDLE (1 << 0)
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/* Generic sysc found on omap4 and later, also known as type2 */
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#define SYSC_OMAP4_DMADISABLE (1 << 16)
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#define SYSC_OMAP4_FREEEMU (1 << 1) /* Also known as EMUFREE */
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#define SYSC_OMAP4_SOFTRESET (1 << 0)
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/* SmartReflex sysc found on 36xx and later */
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#define SYSC_OMAP3_SR_ENAWAKEUP (1 << 26)
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/* SYSCONFIG STANDBYMODE/MIDLEMODE/SIDLEMODE supported by hardware */
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#define SYSC_IDLE_FORCE 0
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#define SYSC_IDLE_NO 1
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#define SYSC_IDLE_SMART 2
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#define SYSC_IDLE_SMART_WKUP 3
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