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Kconfig
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clk: renesas: Add minimal boot support for RZ/G3S SoC
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2023-10-10 09:29:48 +02:00 |
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Makefile
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clk: renesas: Add minimal boot support for RZ/G3S SoC
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2023-10-10 09:29:48 +02:00 |
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clk-div6.c
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clk: renesas: div6: Implement range checking
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2021-05-11 09:58:13 +02:00 |
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clk-div6.h
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We have two changes to the core framework this time around. The first being a
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2017-11-17 20:04:24 -08:00 |
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clk-emev2.c
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clk: renesas: emev2: Remove obsolete clkdev registration
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2023-07-27 14:32:41 +02:00 |
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clk-mstp.c
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clk: renesas: mstp: Convert to readl_poll_timeout_atomic()
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2023-06-05 15:41:43 +02:00 |
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clk-r8a73a4.c
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clk: renesas: r8a73a4: Remove r8a73a4_cpg.reg
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2022-06-13 11:53:18 +02:00 |
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clk-r8a7740.c
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clk: renesas: r8a7740: Remove r8a7740_cpg.reg
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2022-06-13 11:53:18 +02:00 |
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clk-r8a7778.c
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clk: renesas: r8a7778: Remove struct r8a7778_cpg
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2022-06-13 11:53:18 +02:00 |
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clk-r8a7779.c
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clk: renesas: r8a7779: Remove struct r8a7779_cpg
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2022-06-13 11:53:18 +02:00 |
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clk-rz.c
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clk: renesas: rza1: Remove struct rz_cpg
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2022-06-13 11:53:18 +02:00 |
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clk-sh73a0.c
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clk: renesas: sh73a0: Remove sh73a0_cpg.reg
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2022-06-13 11:53:18 +02:00 |
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r7s9210-cpg-mssr.c
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clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flag
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2020-09-17 15:30:08 +02:00 |
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r8a774a1-cpg-mssr.c
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clk: renesas: rcar-gen3: Add ADG clocks
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2023-08-15 11:34:43 +02:00 |
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r8a774b1-cpg-mssr.c
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clk: renesas: rcar-gen3: Add ADG clocks
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2023-08-15 11:34:43 +02:00 |
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r8a774c0-cpg-mssr.c
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clk: renesas: rcar-gen3: Add ADG clocks
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2023-08-15 11:34:43 +02:00 |
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r8a774e1-cpg-mssr.c
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clk: renesas: rcar-gen3: Add ADG clocks
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2023-08-15 11:34:43 +02:00 |
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r8a779a0-cpg-mssr.c
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clk: renesas: r8a779a0: Add PWM clock
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2023-05-08 09:14:33 +02:00 |
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r8a779f0-cpg-mssr.c
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clk: renesas: r8a779f0: Correct PFC/GPIO parent clock
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2024-03-26 18:17:05 -04:00 |
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r8a779g0-cpg-mssr.c
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clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks
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2024-03-26 18:17:05 -04:00 |
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r8a7742-cpg-mssr.c
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clk: renesas: r8a7742: Add clk entry for VSPR
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2020-09-04 09:42:01 +02:00 |
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r8a7743-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a7745-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a7790-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a7791-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a7792-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a7794-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a7795-cpg-mssr.c
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clk: renesas: r8a7795: Constify r8a7795_*_clks
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2023-09-26 09:38:00 +02:00 |
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r8a7796-cpg-mssr.c
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clk: renesas: rcar-gen3: Add ADG clocks
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2023-08-15 11:34:43 +02:00 |
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r8a77470-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a77965-cpg-mssr.c
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clk: renesas: rcar-gen3: Add ADG clocks
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2023-08-15 11:34:43 +02:00 |
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r8a77970-cpg-mssr.c
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clk: renesas: r8a77970: Add Z2 clock
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2023-03-10 17:07:07 +01:00 |
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r8a77980-cpg-mssr.c
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clk: renesas: r8a77980: Add I2C5 clock
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2023-03-30 16:44:04 +02:00 |
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r8a77990-cpg-mssr.c
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clk: renesas: rcar-gen3: Add ADG clocks
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2023-08-15 11:34:43 +02:00 |
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r8a77995-cpg-mssr.c
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clk: renesas: rcar-gen3: Add ADG clocks
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2023-08-15 11:34:43 +02:00 |
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r9a06g032-clocks.c
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clk: renesas: r9a06g032: Name anonymous structs
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2023-09-18 10:05:23 +02:00 |
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r9a07g043-cpg.c
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clk: renesas: r9a07g04[34]: Use SEL_SDHI1_STS status configuration for SD1 mux
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2024-03-26 18:17:05 -04:00 |
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r9a07g044-cpg.c
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clk: renesas: r9a07g04[34]: Use SEL_SDHI1_STS status configuration for SD1 mux
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2024-03-26 18:17:05 -04:00 |
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r9a08g045-cpg.c
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clk: renesas: r9a08g045: Add clock and reset support for ETH0 and ETH1
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2023-12-13 20:05:55 +01:00 |
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r9a09g011-cpg.c
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clk: renesas: r9a09g011: Add CSI related clocks
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2023-07-10 09:31:53 +02:00 |
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rcar-cpg-lib.c
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clk: renesas: rcar-gen3: Extend SDnH divider table
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2023-10-05 13:44:34 +02:00 |
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rcar-cpg-lib.h
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clk: renesas: rcar-gen3: Switch to new SD clock handling
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2021-11-19 11:32:39 +01:00 |
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rcar-gen2-cpg.c
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clk: renesas: Zero init clk_init_data
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2021-03-30 09:58:27 +02:00 |
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rcar-gen2-cpg.h
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clk: renesas: rcar-gen2: Change multipliers and dividers to u8
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2019-12-10 10:24:10 +01:00 |
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rcar-gen3-cpg.c
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clk: renesas: rcar-gen3: Add support for ZG clock
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2023-07-10 09:31:29 +02:00 |
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rcar-gen3-cpg.h
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clk: renesas: rcar-gen3: Add support for ZG clock
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2023-07-10 09:31:29 +02:00 |
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rcar-gen4-cpg.c
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clk: renesas: r8a779g0: Add custom clock for PLL2
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2023-01-24 10:11:50 +01:00 |
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rcar-gen4-cpg.h
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clk: renesas: r8a779g0: Add custom clock for PLL2
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2023-01-24 10:11:50 +01:00 |
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rcar-usb2-clock-sel.c
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clk: Explicitly include correct DT includes
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2023-07-19 13:13:16 -07:00 |
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renesas-cpg-mssr.c
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clk: Explicitly include correct DT includes
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2023-07-19 13:13:16 -07:00 |
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renesas-cpg-mssr.h
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clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*
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2023-02-10 10:35:16 +01:00 |
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rzg2l-cpg.c
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clk: renesas: rzg2l: Check reset monitor registers
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2023-12-13 20:05:36 +01:00 |
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rzg2l-cpg.h
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clk: renesas: Add minimal boot support for RZ/G3S SoC
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2023-10-10 09:29:48 +02:00 |
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