linux-stable/drivers/cxl/core
Alison Schofield 4234d4f8b4 cxl/trace: Properly initialize cxl_poison region name
[ Upstream commit 6c87126096 ]

The TP_STRUCT__entry that gets assigned the region name, or an
empty string if no region is present, is erroneously initialized
to the cxl_region pointer. It needs to be properly initialized
otherwise it's length is wrong and garbage chars can appear in
the kernel trace output: /sys/kernel/tracing/trace

The bad initialization was due in part to a naming conflict with
the parameter: struct cxl_region *region. The field 'region' is
already exposed externally as the region name, so changing that
to something logical, like 'region_name' is not an option. Instead
rename the internal only struct cxl_region to the commonly used
'cxlr'.

Impact is that tooling depending on that trace data can miss
picking up a valid event when searching by region name. The
TP_printk() output, if enabled, does emit the correct region
names in the dmesg log.

This was found during testing of the cxl-list option to report
media-errors for a region.

Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Jonathan Cameron <jonathan.cameron@huawei.com>
Cc: Dave Jiang <dave.jiang@intel.com>
Cc: Vishal Verma <vishal.l.verma@intel.com>
Cc: stable@vger.kernel.org
Fixes: ddf49d57b8 ("cxl/trace: Add TRACE support for CXL media-error records")
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-04-03 15:32:25 +02:00
..
cdat.c cxl: Fix the incorrect assignment of SSLBIS entry pointer initial location 2024-03-26 18:17:27 -04:00
core.h cxl: Calculate and store PCI link latency for the downstream ports 2023-12-22 14:53:49 -08:00
hdm.c cxl/hdm: Fix dpa translation locking 2023-12-07 19:14:04 -08:00
Makefile cxl: Add callback to parse the DSMAS subtables from CDAT 2023-12-22 14:33:10 -08:00
mbox.c cxl: Change 'struct cxl_memdev_state' *_perf_list to single 'struct cxl_dpa_perf' 2024-02-16 23:20:34 -08:00
memdev.c cxl: Fix sysfs export of qos_class for memdev 2024-02-16 23:20:34 -08:00
pci.c cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window 2024-02-16 23:20:34 -08:00
pmem.c cxl: Refactor to use __free() for cxl_root allocation in cxl_find_nvdimm_bridge() 2024-01-05 14:36:29 -08:00
pmu.c cxl/pmu: Ensure put_device on pmu devices 2023-12-14 21:54:45 -08:00
port.c Merge branch 'for-6.7/cxl' into for-6.8/cxl 2024-01-05 19:24:33 -08:00
region.c cxl/region: Allow out of order assembly of autodiscovered regions 2024-02-16 23:20:34 -08:00
regs.c cxl/core/regs: Rework cxl_map_pmu_regs() to use map->dev for devm 2023-10-27 20:13:39 -07:00
suspend.c PM: CXL: Disable suspend 2022-04-22 16:09:42 -07:00
trace.c cxl/trace: Add an HPA to cxl_poison trace events 2023-04-23 11:46:13 -07:00
trace.h cxl/trace: Properly initialize cxl_poison region name 2024-04-03 15:32:25 +02:00