24921dbd29
The PECI CPU sensors are available as soon as the CPU is powered, however the PECI DIMM sensors are available after DRAM has been trained and thresholds have been written by host firmware. The default timeout of 30 seconds isn't enough for modern multisocket platforms utilizing DDR5 memory to bring up the memory and enable PECI sensor data. Bump the default timeout to 10 minutes in case the system starts without cached DDR5 training data. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Link: https://lore.kernel.org/r/20231130090422.2535542-1-patrick.rudolph@9elements.com [groeck: List affected driver in patch subject] Signed-off-by: Guenter Roeck <linux@roeck-us.net> |
||
|---|---|---|
| .. | ||
| Kconfig | ||
| Makefile | ||
| common.h | ||
| cputemp.c | ||
| dimmtemp.c | ||