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![Rohit Hagargundgi](/assets/img/avatar_default.png)
Add support for Samsung Flex-OneNAND devices. Flex-OneNAND combines SLC and MLC technologies into a single device. SLC area provides increased reliability and speed, suitable for storing code such as bootloader, kernel and root file system. MLC area provides high density and is suitable for storing user data. SLC and MLC regions can be configured through kernel parameter. [akpm@linux-foundation.org: export flexoand_region and onenand_addr] Signed-off-by: Rohit Hagargundgi <h.rohit@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Vishak G <vishak.g@samsung.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
562 lines
13 KiB
C
562 lines
13 KiB
C
/*
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* linux/drivers/mtd/onenand/onenand_sim.c
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*
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* The OneNAND simulator
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*
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* Copyright © 2005-2007 Samsung Electronics
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* Kyungmin Park <kyungmin.park@samsung.com>
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*
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* Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
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* Flex-OneNAND simulator support
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* Copyright (C) Samsung Electronics, 2008
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/vmalloc.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/onenand.h>
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#include <linux/io.h>
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#ifndef CONFIG_ONENAND_SIM_MANUFACTURER
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#define CONFIG_ONENAND_SIM_MANUFACTURER 0xec
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#endif
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#ifndef CONFIG_ONENAND_SIM_DEVICE_ID
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#define CONFIG_ONENAND_SIM_DEVICE_ID 0x04
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#endif
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#define CONFIG_FLEXONENAND ((CONFIG_ONENAND_SIM_DEVICE_ID >> 9) & 1)
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#ifndef CONFIG_ONENAND_SIM_VERSION_ID
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#define CONFIG_ONENAND_SIM_VERSION_ID 0x1e
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#endif
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#ifndef CONFIG_ONENAND_SIM_TECHNOLOGY_ID
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#define CONFIG_ONENAND_SIM_TECHNOLOGY_ID CONFIG_FLEXONENAND
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#endif
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/* Initial boundary values for Flex-OneNAND Simulator */
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#ifndef CONFIG_FLEXONENAND_SIM_DIE0_BOUNDARY
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#define CONFIG_FLEXONENAND_SIM_DIE0_BOUNDARY 0x01
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#endif
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#ifndef CONFIG_FLEXONENAND_SIM_DIE1_BOUNDARY
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#define CONFIG_FLEXONENAND_SIM_DIE1_BOUNDARY 0x01
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#endif
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static int manuf_id = CONFIG_ONENAND_SIM_MANUFACTURER;
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static int device_id = CONFIG_ONENAND_SIM_DEVICE_ID;
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static int version_id = CONFIG_ONENAND_SIM_VERSION_ID;
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static int technology_id = CONFIG_ONENAND_SIM_TECHNOLOGY_ID;
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static int boundary[] = {
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CONFIG_FLEXONENAND_SIM_DIE0_BOUNDARY,
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CONFIG_FLEXONENAND_SIM_DIE1_BOUNDARY,
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};
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struct onenand_flash {
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void __iomem *base;
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void __iomem *data;
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};
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#define ONENAND_CORE(flash) (flash->data)
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#define ONENAND_CORE_SPARE(flash, this, offset) \
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((flash->data) + (this->chipsize) + (offset >> 5))
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#define ONENAND_MAIN_AREA(this, offset) \
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(this->base + ONENAND_DATARAM + offset)
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#define ONENAND_SPARE_AREA(this, offset) \
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(this->base + ONENAND_SPARERAM + offset)
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#define ONENAND_GET_WP_STATUS(this) \
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(readw(this->base + ONENAND_REG_WP_STATUS))
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#define ONENAND_SET_WP_STATUS(v, this) \
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(writew(v, this->base + ONENAND_REG_WP_STATUS))
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/* It has all 0xff chars */
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#define MAX_ONENAND_PAGESIZE (4096 + 128)
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static unsigned char *ffchars;
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#if CONFIG_FLEXONENAND
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#define PARTITION_NAME "Flex-OneNAND simulator partition"
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#else
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#define PARTITION_NAME "OneNAND simulator partition"
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#endif
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static struct mtd_partition os_partitions[] = {
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{
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.name = PARTITION_NAME,
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.offset = 0,
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.size = MTDPART_SIZ_FULL,
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},
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};
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/*
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* OneNAND simulator mtd
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*/
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struct onenand_info {
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struct mtd_info mtd;
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struct mtd_partition *parts;
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struct onenand_chip onenand;
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struct onenand_flash flash;
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};
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static struct onenand_info *info;
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#define DPRINTK(format, args...) \
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do { \
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printk(KERN_DEBUG "%s[%d]: " format "\n", __func__, \
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__LINE__, ##args); \
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} while (0)
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/**
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* onenand_lock_handle - Handle Lock scheme
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* @this: OneNAND device structure
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* @cmd: The command to be sent
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*
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* Send lock command to OneNAND device.
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* The lock scheme depends on chip type.
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*/
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static void onenand_lock_handle(struct onenand_chip *this, int cmd)
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{
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int block_lock_scheme;
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int status;
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status = ONENAND_GET_WP_STATUS(this);
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block_lock_scheme = !(this->options & ONENAND_HAS_CONT_LOCK);
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switch (cmd) {
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case ONENAND_CMD_UNLOCK:
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case ONENAND_CMD_UNLOCK_ALL:
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if (block_lock_scheme)
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ONENAND_SET_WP_STATUS(ONENAND_WP_US, this);
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else
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ONENAND_SET_WP_STATUS(status | ONENAND_WP_US, this);
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break;
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case ONENAND_CMD_LOCK:
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if (block_lock_scheme)
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ONENAND_SET_WP_STATUS(ONENAND_WP_LS, this);
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else
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ONENAND_SET_WP_STATUS(status | ONENAND_WP_LS, this);
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break;
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case ONENAND_CMD_LOCK_TIGHT:
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if (block_lock_scheme)
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ONENAND_SET_WP_STATUS(ONENAND_WP_LTS, this);
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else
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ONENAND_SET_WP_STATUS(status | ONENAND_WP_LTS, this);
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break;
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default:
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break;
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}
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}
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/**
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* onenand_bootram_handle - Handle BootRAM area
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* @this: OneNAND device structure
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* @cmd: The command to be sent
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*
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* Emulate BootRAM area. It is possible to do basic operation using BootRAM.
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*/
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static void onenand_bootram_handle(struct onenand_chip *this, int cmd)
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{
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switch (cmd) {
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case ONENAND_CMD_READID:
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writew(manuf_id, this->base);
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writew(device_id, this->base + 2);
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writew(version_id, this->base + 4);
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break;
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default:
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/* REVIST: Handle other commands */
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break;
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}
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}
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/**
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* onenand_update_interrupt - Set interrupt register
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* @this: OneNAND device structure
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* @cmd: The command to be sent
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*
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* Update interrupt register. The status depends on command.
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*/
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static void onenand_update_interrupt(struct onenand_chip *this, int cmd)
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{
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int interrupt = ONENAND_INT_MASTER;
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switch (cmd) {
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case ONENAND_CMD_READ:
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case ONENAND_CMD_READOOB:
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interrupt |= ONENAND_INT_READ;
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break;
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case ONENAND_CMD_PROG:
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case ONENAND_CMD_PROGOOB:
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interrupt |= ONENAND_INT_WRITE;
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break;
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case ONENAND_CMD_ERASE:
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interrupt |= ONENAND_INT_ERASE;
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break;
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case ONENAND_CMD_RESET:
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interrupt |= ONENAND_INT_RESET;
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break;
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default:
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break;
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}
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writew(interrupt, this->base + ONENAND_REG_INTERRUPT);
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}
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/**
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* onenand_check_overwrite - Check if over-write happened
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* @dest: The destination pointer
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* @src: The source pointer
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* @count: The length to be check
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*
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* Returns: 0 on same, otherwise 1
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*
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* Compare the source with destination
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*/
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static int onenand_check_overwrite(void *dest, void *src, size_t count)
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{
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unsigned int *s = (unsigned int *) src;
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unsigned int *d = (unsigned int *) dest;
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int i;
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count >>= 2;
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for (i = 0; i < count; i++)
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if ((*s++ ^ *d++) != 0)
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return 1;
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return 0;
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}
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/**
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* onenand_data_handle - Handle OneNAND Core and DataRAM
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* @this: OneNAND device structure
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* @cmd: The command to be sent
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* @dataram: Which dataram used
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* @offset: The offset to OneNAND Core
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*
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* Copy data from OneNAND Core to DataRAM (read)
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* Copy data from DataRAM to OneNAND Core (write)
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* Erase the OneNAND Core (erase)
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*/
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static void onenand_data_handle(struct onenand_chip *this, int cmd,
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int dataram, unsigned int offset)
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{
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struct mtd_info *mtd = &info->mtd;
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struct onenand_flash *flash = this->priv;
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int main_offset, spare_offset, die = 0;
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void __iomem *src;
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void __iomem *dest;
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unsigned int i;
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static int pi_operation;
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int erasesize, rgn;
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if (dataram) {
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main_offset = mtd->writesize;
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spare_offset = mtd->oobsize;
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} else {
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main_offset = 0;
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spare_offset = 0;
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}
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if (pi_operation) {
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die = readw(this->base + ONENAND_REG_START_ADDRESS2);
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die >>= ONENAND_DDP_SHIFT;
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}
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switch (cmd) {
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case FLEXONENAND_CMD_PI_ACCESS:
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pi_operation = 1;
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break;
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case ONENAND_CMD_RESET:
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pi_operation = 0;
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break;
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case ONENAND_CMD_READ:
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src = ONENAND_CORE(flash) + offset;
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dest = ONENAND_MAIN_AREA(this, main_offset);
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if (pi_operation) {
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writew(boundary[die], this->base + ONENAND_DATARAM);
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break;
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}
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memcpy(dest, src, mtd->writesize);
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/* Fall through */
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case ONENAND_CMD_READOOB:
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src = ONENAND_CORE_SPARE(flash, this, offset);
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dest = ONENAND_SPARE_AREA(this, spare_offset);
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memcpy(dest, src, mtd->oobsize);
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break;
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case ONENAND_CMD_PROG:
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src = ONENAND_MAIN_AREA(this, main_offset);
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dest = ONENAND_CORE(flash) + offset;
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if (pi_operation) {
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boundary[die] = readw(this->base + ONENAND_DATARAM);
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break;
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}
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/* To handle partial write */
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for (i = 0; i < (1 << mtd->subpage_sft); i++) {
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int off = i * this->subpagesize;
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if (!memcmp(src + off, ffchars, this->subpagesize))
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continue;
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if (memcmp(dest + off, ffchars, this->subpagesize) &&
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onenand_check_overwrite(dest + off, src + off, this->subpagesize))
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printk(KERN_ERR "over-write happend at 0x%08x\n", offset);
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memcpy(dest + off, src + off, this->subpagesize);
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}
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/* Fall through */
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case ONENAND_CMD_PROGOOB:
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src = ONENAND_SPARE_AREA(this, spare_offset);
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/* Check all data is 0xff chars */
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if (!memcmp(src, ffchars, mtd->oobsize))
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break;
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dest = ONENAND_CORE_SPARE(flash, this, offset);
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if (memcmp(dest, ffchars, mtd->oobsize) &&
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onenand_check_overwrite(dest, src, mtd->oobsize))
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printk(KERN_ERR "OOB: over-write happend at 0x%08x\n",
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offset);
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memcpy(dest, src, mtd->oobsize);
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break;
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case ONENAND_CMD_ERASE:
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if (pi_operation)
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break;
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if (FLEXONENAND(this)) {
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rgn = flexonenand_region(mtd, offset);
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erasesize = mtd->eraseregions[rgn].erasesize;
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} else
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erasesize = mtd->erasesize;
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memset(ONENAND_CORE(flash) + offset, 0xff, erasesize);
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memset(ONENAND_CORE_SPARE(flash, this, offset), 0xff,
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(erasesize >> 5));
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break;
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default:
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break;
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}
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}
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/**
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* onenand_command_handle - Handle command
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* @this: OneNAND device structure
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* @cmd: The command to be sent
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*
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* Emulate OneNAND command.
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*/
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static void onenand_command_handle(struct onenand_chip *this, int cmd)
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{
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unsigned long offset = 0;
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int block = -1, page = -1, bufferram = -1;
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int dataram = 0;
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switch (cmd) {
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case ONENAND_CMD_UNLOCK:
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case ONENAND_CMD_LOCK:
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case ONENAND_CMD_LOCK_TIGHT:
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case ONENAND_CMD_UNLOCK_ALL:
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onenand_lock_handle(this, cmd);
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break;
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case ONENAND_CMD_BUFFERRAM:
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/* Do nothing */
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return;
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default:
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block = (int) readw(this->base + ONENAND_REG_START_ADDRESS1);
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if (block & (1 << ONENAND_DDP_SHIFT)) {
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block &= ~(1 << ONENAND_DDP_SHIFT);
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/* The half of chip block */
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block += this->chipsize >> (this->erase_shift + 1);
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}
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if (cmd == ONENAND_CMD_ERASE)
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break;
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page = (int) readw(this->base + ONENAND_REG_START_ADDRESS8);
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page = (page >> ONENAND_FPA_SHIFT);
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bufferram = (int) readw(this->base + ONENAND_REG_START_BUFFER);
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bufferram >>= ONENAND_BSA_SHIFT;
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bufferram &= ONENAND_BSA_DATARAM1;
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dataram = (bufferram == ONENAND_BSA_DATARAM1) ? 1 : 0;
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break;
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}
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if (block != -1)
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offset = onenand_addr(this, block);
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if (page != -1)
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offset += page << this->page_shift;
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onenand_data_handle(this, cmd, dataram, offset);
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onenand_update_interrupt(this, cmd);
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}
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/**
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* onenand_writew - [OneNAND Interface] Emulate write operation
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* @value: value to write
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* @addr: address to write
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*
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* Write OneNAND register with value
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*/
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static void onenand_writew(unsigned short value, void __iomem * addr)
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{
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struct onenand_chip *this = info->mtd.priv;
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/* BootRAM handling */
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if (addr < this->base + ONENAND_DATARAM) {
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onenand_bootram_handle(this, value);
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return;
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}
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/* Command handling */
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if (addr == this->base + ONENAND_REG_COMMAND)
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onenand_command_handle(this, value);
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writew(value, addr);
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}
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/**
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* flash_init - Initialize OneNAND simulator
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* @flash: OneNAND simulator data strucutres
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*
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* Initialize OneNAND simulator.
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*/
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static int __init flash_init(struct onenand_flash *flash)
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{
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int density, size;
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int buffer_size;
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flash->base = kzalloc(131072, GFP_KERNEL);
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if (!flash->base) {
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printk(KERN_ERR "Unable to allocate base address.\n");
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return -ENOMEM;
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}
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density = device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
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density &= ONENAND_DEVICE_DENSITY_MASK;
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size = ((16 << 20) << density);
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ONENAND_CORE(flash) = vmalloc(size + (size >> 5));
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if (!ONENAND_CORE(flash)) {
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printk(KERN_ERR "Unable to allocate nand core address.\n");
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kfree(flash->base);
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return -ENOMEM;
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}
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memset(ONENAND_CORE(flash), 0xff, size + (size >> 5));
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/* Setup registers */
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writew(manuf_id, flash->base + ONENAND_REG_MANUFACTURER_ID);
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writew(device_id, flash->base + ONENAND_REG_DEVICE_ID);
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writew(version_id, flash->base + ONENAND_REG_VERSION_ID);
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writew(technology_id, flash->base + ONENAND_REG_TECHNOLOGY);
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if (density < 2 && (!CONFIG_FLEXONENAND))
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buffer_size = 0x0400; /* 1KiB page */
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else
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buffer_size = 0x0800; /* 2KiB page */
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writew(buffer_size, flash->base + ONENAND_REG_DATA_BUFFER_SIZE);
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return 0;
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}
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/**
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* flash_exit - Clean up OneNAND simulator
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* @flash: OneNAND simulator data structures
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*
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* Clean up OneNAND simulator.
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*/
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static void flash_exit(struct onenand_flash *flash)
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{
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vfree(ONENAND_CORE(flash));
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kfree(flash->base);
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}
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static int __init onenand_sim_init(void)
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{
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/* Allocate all 0xff chars pointer */
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ffchars = kmalloc(MAX_ONENAND_PAGESIZE, GFP_KERNEL);
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if (!ffchars) {
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printk(KERN_ERR "Unable to allocate ff chars.\n");
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return -ENOMEM;
|
|
}
|
|
memset(ffchars, 0xff, MAX_ONENAND_PAGESIZE);
|
|
|
|
/* Allocate OneNAND simulator mtd pointer */
|
|
info = kzalloc(sizeof(struct onenand_info), GFP_KERNEL);
|
|
if (!info) {
|
|
printk(KERN_ERR "Unable to allocate core structures.\n");
|
|
kfree(ffchars);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/* Override write_word function */
|
|
info->onenand.write_word = onenand_writew;
|
|
|
|
if (flash_init(&info->flash)) {
|
|
printk(KERN_ERR "Unable to allocate flash.\n");
|
|
kfree(ffchars);
|
|
kfree(info);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
info->parts = os_partitions;
|
|
|
|
info->onenand.base = info->flash.base;
|
|
info->onenand.priv = &info->flash;
|
|
|
|
info->mtd.name = "OneNAND simulator";
|
|
info->mtd.priv = &info->onenand;
|
|
info->mtd.owner = THIS_MODULE;
|
|
|
|
if (onenand_scan(&info->mtd, 1)) {
|
|
flash_exit(&info->flash);
|
|
kfree(ffchars);
|
|
kfree(info);
|
|
return -ENXIO;
|
|
}
|
|
|
|
add_mtd_partitions(&info->mtd, info->parts, ARRAY_SIZE(os_partitions));
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void __exit onenand_sim_exit(void)
|
|
{
|
|
struct onenand_chip *this = info->mtd.priv;
|
|
struct onenand_flash *flash = this->priv;
|
|
|
|
onenand_release(&info->mtd);
|
|
flash_exit(flash);
|
|
kfree(ffchars);
|
|
kfree(info);
|
|
}
|
|
|
|
module_init(onenand_sim_init);
|
|
module_exit(onenand_sim_exit);
|
|
|
|
MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
|
|
MODULE_DESCRIPTION("The OneNAND flash simulator");
|
|
MODULE_LICENSE("GPL");
|