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24da2c2429
Add MT8195 scp adsp clock controller which provides clock gate control for Audio DSP. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-16-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
47 lines
1.2 KiB
C
47 lines
1.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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//
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// Copyright (c) 2021 MediaTek Inc.
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// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
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#include "clk-gate.h"
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#include "clk-mtk.h"
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#include <dt-bindings/clock/mt8195-clk.h>
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#include <linux/clk-provider.h>
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#include <linux/platform_device.h>
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static const struct mtk_gate_regs scp_adsp_cg_regs = {
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.set_ofs = 0x180,
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.clr_ofs = 0x180,
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.sta_ofs = 0x180,
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};
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#define GATE_SCP_ADSP(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &scp_adsp_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
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static const struct mtk_gate scp_adsp_clks[] = {
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GATE_SCP_ADSP(CLK_SCP_ADSP_AUDIODSP, "scp_adsp_audiodsp", "top_adsp", 0),
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};
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static const struct mtk_clk_desc scp_adsp_desc = {
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.clks = scp_adsp_clks,
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.num_clks = ARRAY_SIZE(scp_adsp_clks),
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};
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static const struct of_device_id of_match_clk_mt8195_scp_adsp[] = {
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{
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.compatible = "mediatek,mt8195-scp_adsp",
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.data = &scp_adsp_desc,
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}, {
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/* sentinel */
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}
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};
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static struct platform_driver clk_mt8195_scp_adsp_drv = {
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.probe = mtk_clk_simple_probe,
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.driver = {
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.name = "clk-mt8195-scp_adsp",
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.of_match_table = of_match_clk_mt8195_scp_adsp,
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},
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};
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builtin_platform_driver(clk_mt8195_scp_adsp_drv);
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