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Based on 1 normalized pattern(s): the code contained herein is licensed under the gnu general public license you may obtain a copy of the gnu general public license version 2 or later at the following locations http www opensource org licenses gpl license html http www gnu org copyleft gpl html extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 161 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.383790741@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
61 lines
1.7 KiB
C
61 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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*/
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#ifndef __MXS_CLK_H
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#define __MXS_CLK_H
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struct clk;
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#include <linux/clk-provider.h>
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#include <linux/spinlock.h>
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#define SET 0x4
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#define CLR 0x8
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extern spinlock_t mxs_lock;
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int mxs_clk_wait(void __iomem *reg, u8 shift);
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struct clk *mxs_clk_pll(const char *name, const char *parent_name,
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void __iomem *base, u8 power, unsigned long rate);
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struct clk *mxs_clk_ref(const char *name, const char *parent_name,
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void __iomem *reg, u8 idx);
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struct clk *mxs_clk_div(const char *name, const char *parent_name,
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void __iomem *reg, u8 shift, u8 width, u8 busy);
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struct clk *mxs_clk_frac(const char *name, const char *parent_name,
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void __iomem *reg, u8 shift, u8 width, u8 busy);
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static inline struct clk *mxs_clk_fixed(const char *name, int rate)
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{
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return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
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}
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static inline struct clk *mxs_clk_gate(const char *name,
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const char *parent_name, void __iomem *reg, u8 shift)
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{
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return clk_register_gate(NULL, name, parent_name, CLK_SET_RATE_PARENT,
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reg, shift, CLK_GATE_SET_TO_DISABLE,
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&mxs_lock);
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}
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static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char *const *parent_names, int num_parents)
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{
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return clk_register_mux(NULL, name, parent_names, num_parents,
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CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
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reg, shift, width, 0, &mxs_lock);
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}
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static inline struct clk *mxs_clk_fixed_factor(const char *name,
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const char *parent_name, unsigned int mult, unsigned int div)
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{
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return clk_register_fixed_factor(NULL, name, parent_name,
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CLK_SET_RATE_PARENT, mult, div);
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}
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#endif /* __MXS_CLK_H */
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