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af873fcece
Based on 1 normalized pattern(s): license terms gnu general public license gpl version 2 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 161 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528170027.447718015@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
159 lines
3.5 KiB
C
159 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* PRCC clock implementation for ux500 platform.
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*
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* Copyright (C) 2012 ST-Ericsson SA
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* Author: Ulf Hansson <ulf.hansson@linaro.org>
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*/
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#include <linux/clk-provider.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/types.h>
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#include "clk.h"
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#define PRCC_PCKEN 0x000
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#define PRCC_PCKDIS 0x004
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#define PRCC_KCKEN 0x008
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#define PRCC_KCKDIS 0x00C
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#define PRCC_PCKSR 0x010
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#define PRCC_KCKSR 0x014
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#define to_clk_prcc(_hw) container_of(_hw, struct clk_prcc, hw)
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struct clk_prcc {
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struct clk_hw hw;
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void __iomem *base;
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u32 cg_sel;
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int is_enabled;
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};
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/* PRCC clock operations. */
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static int clk_prcc_pclk_enable(struct clk_hw *hw)
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{
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struct clk_prcc *clk = to_clk_prcc(hw);
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writel(clk->cg_sel, (clk->base + PRCC_PCKEN));
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while (!(readl(clk->base + PRCC_PCKSR) & clk->cg_sel))
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cpu_relax();
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clk->is_enabled = 1;
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return 0;
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}
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static void clk_prcc_pclk_disable(struct clk_hw *hw)
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{
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struct clk_prcc *clk = to_clk_prcc(hw);
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writel(clk->cg_sel, (clk->base + PRCC_PCKDIS));
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clk->is_enabled = 0;
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}
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static int clk_prcc_kclk_enable(struct clk_hw *hw)
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{
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struct clk_prcc *clk = to_clk_prcc(hw);
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writel(clk->cg_sel, (clk->base + PRCC_KCKEN));
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while (!(readl(clk->base + PRCC_KCKSR) & clk->cg_sel))
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cpu_relax();
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clk->is_enabled = 1;
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return 0;
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}
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static void clk_prcc_kclk_disable(struct clk_hw *hw)
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{
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struct clk_prcc *clk = to_clk_prcc(hw);
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writel(clk->cg_sel, (clk->base + PRCC_KCKDIS));
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clk->is_enabled = 0;
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}
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static int clk_prcc_is_enabled(struct clk_hw *hw)
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{
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struct clk_prcc *clk = to_clk_prcc(hw);
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return clk->is_enabled;
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}
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static const struct clk_ops clk_prcc_pclk_ops = {
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.enable = clk_prcc_pclk_enable,
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.disable = clk_prcc_pclk_disable,
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.is_enabled = clk_prcc_is_enabled,
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};
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static const struct clk_ops clk_prcc_kclk_ops = {
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.enable = clk_prcc_kclk_enable,
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.disable = clk_prcc_kclk_disable,
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.is_enabled = clk_prcc_is_enabled,
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};
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static struct clk *clk_reg_prcc(const char *name,
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const char *parent_name,
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resource_size_t phy_base,
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u32 cg_sel,
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unsigned long flags,
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const struct clk_ops *clk_prcc_ops)
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{
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struct clk_prcc *clk;
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struct clk_init_data clk_prcc_init;
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struct clk *clk_reg;
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if (!name) {
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pr_err("clk_prcc: %s invalid arguments passed\n", __func__);
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return ERR_PTR(-EINVAL);
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}
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clk = kzalloc(sizeof(*clk), GFP_KERNEL);
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if (!clk)
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return ERR_PTR(-ENOMEM);
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clk->base = ioremap(phy_base, SZ_4K);
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if (!clk->base)
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goto free_clk;
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clk->cg_sel = cg_sel;
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clk->is_enabled = 1;
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clk_prcc_init.name = name;
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clk_prcc_init.ops = clk_prcc_ops;
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clk_prcc_init.flags = flags;
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clk_prcc_init.parent_names = (parent_name ? &parent_name : NULL);
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clk_prcc_init.num_parents = (parent_name ? 1 : 0);
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clk->hw.init = &clk_prcc_init;
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clk_reg = clk_register(NULL, &clk->hw);
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if (IS_ERR_OR_NULL(clk_reg))
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goto unmap_clk;
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return clk_reg;
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unmap_clk:
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iounmap(clk->base);
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free_clk:
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kfree(clk);
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pr_err("clk_prcc: %s failed to register clk\n", __func__);
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return ERR_PTR(-ENOMEM);
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}
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struct clk *clk_reg_prcc_pclk(const char *name,
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const char *parent_name,
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resource_size_t phy_base,
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u32 cg_sel,
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unsigned long flags)
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{
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return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
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&clk_prcc_pclk_ops);
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}
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struct clk *clk_reg_prcc_kclk(const char *name,
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const char *parent_name,
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resource_size_t phy_base,
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u32 cg_sel,
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unsigned long flags)
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{
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return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
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&clk_prcc_kclk_ops);
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}
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