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af873fcece
Based on 1 normalized pattern(s): license terms gnu general public license gpl version 2 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 161 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528170027.447718015@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
90 lines
2.3 KiB
C
90 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Clocks for ux500 platforms
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*
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* Copyright (C) 2012 ST-Ericsson SA
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* Author: Ulf Hansson <ulf.hansson@linaro.org>
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*/
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#ifndef __UX500_CLK_H
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#define __UX500_CLK_H
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#include <linux/device.h>
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#include <linux/types.h>
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struct clk;
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struct clk *clk_reg_prcc_pclk(const char *name,
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const char *parent_name,
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resource_size_t phy_base,
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u32 cg_sel,
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unsigned long flags);
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struct clk *clk_reg_prcc_kclk(const char *name,
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const char *parent_name,
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resource_size_t phy_base,
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u32 cg_sel,
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unsigned long flags);
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struct clk *clk_reg_prcmu_scalable(const char *name,
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const char *parent_name,
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u8 cg_sel,
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unsigned long rate,
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unsigned long flags);
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struct clk *clk_reg_prcmu_gate(const char *name,
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const char *parent_name,
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u8 cg_sel,
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unsigned long flags);
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struct clk *clk_reg_prcmu_scalable_rate(const char *name,
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const char *parent_name,
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u8 cg_sel,
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unsigned long rate,
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unsigned long flags);
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struct clk *clk_reg_prcmu_rate(const char *name,
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const char *parent_name,
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u8 cg_sel,
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unsigned long flags);
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struct clk *clk_reg_prcmu_opp_gate(const char *name,
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const char *parent_name,
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u8 cg_sel,
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unsigned long flags);
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struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name,
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const char *parent_name,
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u8 cg_sel,
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unsigned long rate,
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unsigned long flags);
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struct clk *clk_reg_sysctrl_gate(struct device *dev,
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const char *name,
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const char *parent_name,
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u16 reg_sel,
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u8 reg_mask,
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u8 reg_bits,
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unsigned long enable_delay_us,
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unsigned long flags);
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struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
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const char *name,
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const char *parent_name,
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u16 reg_sel,
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u8 reg_mask,
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u8 reg_bits,
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unsigned long rate,
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unsigned long enable_delay_us,
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unsigned long flags);
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struct clk *clk_reg_sysctrl_set_parent(struct device *dev,
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const char *name,
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const char **parent_names,
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u8 num_parents,
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u16 *reg_sel,
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u8 *reg_mask,
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u8 *reg_bits,
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unsigned long flags);
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#endif /* __UX500_CLK_H */
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