linux-stable/arch/arm/mm
Eric Miao 20072fd0c9 [ARM] pxa: add support for L2 outer cache on XScale3
The initial patch from Lothar, and Lennert make it into a cleaner
one, modified and tested on PXA320 by Eric Miao.

This patch moves the L2 cache operations out of proc-xsc3.S into
dedicated outer cache support code.

CACHE_XSC3L2 can be deselected so no L2 cache specific code will be
linked in, and that L2 enable bit will not be set, this applies to
the following cases:

    a. _only_ PXA300/PXA310 support included and no L2 cache wanted
    b. PXA320 support included, but want L2 be disabled

So the enabling of L2 depends on two things:

    - CACHE_XSC3L2 is selected
    - and L2 cache is present

Where the latter is only a safeguard (previous testing shows it works
OK even when this bit is turned on).

IXP series of processors with XScale3 cannot disable L2 cache for the
moment since they depend on the L2 cache for its coherent memory, so
IXP may always select CACHE_XSC3L2.

Other L2 relevant bits are always turned on (i.e. the original code
enclosed by #if L2_CACHE_ENABLED .. #endif), as they showed no side
effects. Specifically, these bits are:

   - OC bits in TTBASE register (table walk outer cache attributes)
   - LLR Outer Cache Attributes (OC) in Auxiliary Control Register

Signed-off-by: Lothar WaÃ<9f>mann <LW@KARO-electronics.de>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 21:38:33 +01:00
..
abort-ev4.S
abort-ev4t.S
abort-ev5t.S
abort-ev5tj.S
abort-ev6.S
abort-ev7.S [ARM] armv7: add support for ARMv7 cores. 2007-05-08 22:55:53 +01:00
abort-lv4t.S
abort-macro.S
abort-nommu.S
alignment.c Use helpers to obtain task pid in printks (arch code) 2007-10-19 11:53:43 -07:00
cache-l2x0.c [ARM] 4568/1: fix l2x0 cache invalidate handling of unaligned addresses 2007-09-17 14:56:39 +01:00
cache-v3.S
cache-v4.S
cache-v4wb.S
cache-v4wt.S
cache-v6.S
cache-v7.S [ARM] armv7: add support for ARMv7 cores. 2007-05-08 22:55:53 +01:00
consistent.c [ARM] remove useless setting of VM_RESERVED 2007-11-11 10:55:25 +00:00
context.c Merge branches 'armv7', 'at91', 'misc' and 'omap' into devel 2007-05-09 10:41:28 +01:00
copypage-feroceon.S [ARM] Feroceon: Feroceon-specific WA-cache compatible {copy,clear}_user_page() 2008-04-28 16:06:51 -04:00
copypage-v3.S
copypage-v4mc.c [ARM] 4078/1: Fix ARM copypage cache coherency problems 2006-12-30 17:05:08 +00:00
copypage-v4wb.S
copypage-v4wt.S
copypage-v6.c [ARM] 4078/1: Fix ARM copypage cache coherency problems 2006-12-30 17:05:08 +00:00
copypage-xsc3.S
copypage-xscale.c [ARM] 4078/1: Fix ARM copypage cache coherency problems 2006-12-30 17:05:08 +00:00
discontig.c
extable.c
fault-armv.c [ARM] 4191/1: Remove redundant __flush_dcache_page() function prototype 2007-02-16 12:57:55 +00:00
fault.c ARM kprobes: prevent some functions involved with kprobes from being probed 2008-01-26 15:25:17 +00:00
fault.h
flush.c [ARM] Resolve fuse and direct-IO failures due to missing cache flushes 2007-01-08 19:49:58 +00:00
init.c [ARM] remove redundant display of free swap space in show_mem() 2008-04-19 11:28:10 +01:00
iomap.c iomap: fix 64 bits resources on 32 bits 2008-04-29 08:06:02 -07:00
ioremap.c add mm argument to pte/pmd/pud/pgd_free 2008-02-05 09:44:18 -08:00
Kconfig [ARM] Feroceon: Feroceon-specific WA-cache compatible {copy,clear}_user_page() 2008-04-28 16:06:51 -04:00
Makefile [ARM] pxa: add support for L2 outer cache on XScale3 2008-07-09 21:38:33 +01:00
mm.h [ARM] mm 6: allow mem_types table to specify extended pte attributes 2007-04-21 20:36:02 +01:00
mmap.c [ARM] 4839/1: fixes kernel Oops in /dev/mem device driver for memory map with PHYS_OFF 2008-02-29 22:47:20 +00:00
mmu.c arm: Export empty_zero_page for ZERO_PAGE usage in modules. 2008-04-29 08:11:12 -04:00
nommu.c Introduce flags for reserve_bootmem() 2008-02-07 08:42:25 -08:00
pgd.c [ARM] Fix freeing of page tables for ARM in free_pgd_slow 2008-03-01 20:23:57 +00:00
proc-arm6_7.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-arm7tdmi.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-arm9tdmi.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-arm720.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-arm740.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-arm920.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-arm922.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-arm925.S [ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode 2008-05-17 22:55:14 +01:00
proc-arm926.S [ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode 2008-05-17 22:55:14 +01:00
proc-arm940.S [ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode 2008-05-17 22:55:14 +01:00
proc-arm946.S [ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode 2008-05-17 22:55:14 +01:00
proc-arm1020.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-arm1020e.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-arm1022.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-arm1026.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-feroceon.S [ARM] Feroceon: Feroceon-specific WA-cache compatible {copy,clear}_user_page() 2008-04-28 16:06:51 -04:00
proc-macros.S [ARM] armv7: add support for ARMv7 cores. 2007-05-08 22:55:53 +01:00
proc-sa110.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-sa1100.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-syms.c [ARM] 4502/1: nommu: Do not export the copy/clear user page functions 2007-07-20 21:29:51 +01:00
proc-v6.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-v7.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-xsc3.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
proc-xscale.S [ARM] fix 48d7927bdf 2008-04-24 10:06:45 +01:00
tlb-v3.S
tlb-v4.S
tlb-v4wb.S
tlb-v4wbi.S
tlb-v6.S [ARM] 4129/1: Add barriers after the TLB operations 2007-02-08 14:49:27 +00:00
tlb-v7.S [ARM] 4394/1: ARMv7: Add the TLB range operations 2007-05-30 14:32:07 +01:00