linux-stable/arch/arm64/mm
Steve Capper 206a2a73a6 arm64: mm: Create gigabyte kernel logical mappings where possible
We have the capability to map 1GB level 1 blocks when using a 4K
granule.

This patch adjusts the create_mapping logic s.t. when mapping physical
memory on boot, we attempt to use a 1GB block if both the VA and PA
start and end are 1GB aligned. This both reduces the levels of lookup
required to resolve a kernel logical address, as well as reduces TLB
pressure on cores that support 1GB TLB entries.

Signed-off-by: Steve Capper <steve.capper@linaro.org>
Tested-by: Jungseok Lee <jays.lee@samsung.com>
[catalin.marinas@arm.com: s/prot_sect_kernel/PROT_SECT_NORMAL_EXEC/]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-05-09 16:10:58 +01:00
..
cache.S arm64: Fix DMA range invalidation for cache line unaligned buffers 2014-04-08 11:45:08 +01:00
context.c arm64: Process management 2012-09-17 13:41:58 +01:00
copypage.c arm64: MMU fault handling and page table management 2012-09-17 13:41:57 +01:00
dma-mapping.c arm64: Clean up the default pgprot setting 2014-05-09 15:53:37 +01:00
extable.c arm64: MMU fault handling and page table management 2012-09-17 13:41:57 +01:00
fault.c arm64: Introduce execute-only page access permissions 2014-05-09 15:53:36 +01:00
flush.c arm64: Remove __flush_dcache_page() 2013-06-07 17:58:30 +01:00
hugetlbpage.c mm: migrate: check movability of hugepage in unmap_and_move_huge_page() 2013-09-11 15:57:49 -07:00
init.c Devicetree changes for v3.15 2014-04-02 14:27:15 -07:00
ioremap.c arm64: add early_ioremap support 2014-04-07 16:36:15 -07:00
Makefile ARM64: mm: HugeTLB support. 2013-06-14 09:52:40 +01:00
mm.h arm64: Remove __flush_dcache_page() 2013-06-07 17:58:30 +01:00
mmap.c mm: remove free_area_cache 2013-07-10 18:11:34 -07:00
mmu.c arm64: mm: Create gigabyte kernel logical mappings where possible 2014-05-09 16:10:58 +01:00
pgd.c arm64: simplify pgd_alloc 2014-02-05 10:45:07 +00:00
proc-macros.S arm64: mm: use ubfm for dcache_line_size 2014-01-22 16:23:58 +00:00
proc.S arm64: Update the TCR_EL1 translation granule definitions for 16K pages 2014-04-03 10:43:11 +01:00
tlb.S arm64: use correct register width when retrieving ASID 2013-09-25 16:42:23 +01:00