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![Linus Torvalds](/assets/img/avatar_default.png)
Updates for SoC specific drivers include a few subsystems that have their own maintainers but send them through the soc tree: TEE/OP-TEE: - Add tracepoints around calls to secure world Memory controller drivers: - Minor fixes for Renesas, Exynos, Mediatek and Tegra platforms - Add debug statistics to Tegra20 memory controller - Update Tegra bindings and convert to dtschema ARM SCMI Firmware: - Support for modular SCMI protocols and vendor specific extensions - New SCMI IIO driver - Per-cpu DVFS The other driver changes are all from the platform maintainers directly and reflect the drivers that don't fit into any other subsystem as well as treewide changes for a particular platform. SoCFPGA: - Various cleanups contributed by Krzysztof Kozlowski Mediatek: - add MT8183 support to mutex driver - MMSYS: use per SoC array to describe the possible routing - add MMSYS support for MT8183 and MT8167 - add support for PMIC wrapper with integrated arbiter - add support for MT8192/MT6873 Tegra: - Bug fixes to PMC and clock drivers NXP/i.MX: - Update SCU power domain driver to keep console domain power on. - Add missing ADC1 power domain to SCU power domain driver. - Update comments for single global power domain in SCU power domain driver. - Add i.MX51/i.MX53 unique id support to i.MX SoC driver. NXP/FSL SoC driver updates for v5.13 - Add ACPI support for RCPM driver - Use generic io{read,write} for QE drivers after performance optimized for PowerPC - Fix QBMAN probe to cleanup HW states correctly for kexec - Various cleanup and style fix for QBMAN/QE/GUTS drivers OMAP: - Preparation to use devicetree for genpd - ti-sysc needs iorange check improved when the interconnect target module has no control registers listed - ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid issues with missing resources and unnecessary deferred probe - ti-sysc debug option can now detect more devices - ti-sysc now warns if an old incomplete devicetree data is found as we now rely on it being complete for am3 and 4 - soc init code needs to check for prcm and prm nodes for omap4/5 and dra7 - omap-prm driver needs to enable autoidle retention support for omap4 - omap5 clocks are missing gpmc and ocmc clock registers - pci-dra7xx now needs to use builtin_platform_driver instead of using builtin_platform_driver_probe for deferred probe to work Raspberry Pi: - Fix-up all RPi firmware drivers so as for unbind to happen in an orderly fashion - Support for RPi's PoE hat PWM bus Qualcomm - Improved detection for SCM calling conventions - Support for OEM specific wifi firmware path - Added drivers for SC7280/SM8350: RPMH, LLCC< AOSS QMP Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmCC2JwACgkQmmx57+YA GNkgRg//cBtq2NyDbjiNABxFSkmGCfcc0w0C2wjVzr4cfg6BLTbuvvlpZxI912pu P1G2sbsdfQJ8sSeIyZos+PilWK0zHrqlaGZfKI19US45dMjpteDBgsPd7wNZwBjQ jbops3YLjztZK1HpY4dIdvMnfxt7yRqhBWaTbPuCwQ35c5KsOM8NHB3cP3BUINWK x1uuBCv9svppzwdDiPxneV93WKEzabOUo+WBMPyh5vnyvmW17Iif4BA/VKQxzymm mWUi8HHpKBpvntJOKwAD2hnLAdpR3SwX20SLOpyLhnJMotbzNUEqq3LdRxDNPdHk ry+rarJ78JGlYfpcfegf2bLf5ITNMfOyRGkjtzeYpcZIXPjufOg9DA9YtAy37k0u L0T/9gQ+tQ01WGMca77OyUtIqJKdblZrQMfuH/yGlR99bqFQMV7rNc7GNlX1MXp/ zw4aOYrRWGtGEeAjx5JJWcYydvMSJpCrqxTz3YhgeJECHB2iA6YkV3NROR4TLW// tfxaKqxR/KmSqE6hoVOAuuQ0BLXNlql/+4EE6MKsAOBiKPJclvmJg4CyuY8G21ev 9Su0zJnXMzai7gNu32v1pizGj26+AOhxCEgAG0mGgk2jlQSn24CKgm5e7kCUewcF j/1XksNPT95v/K8MsLpXe5xGvF3jhA1BlFfvjJNZOrcZywBXRxg= =iidq -----END PGP SIGNATURE----- Merge tag 'arm-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "Updates for SoC specific drivers include a few subsystems that have their own maintainers but send them through the soc tree: TEE/OP-TEE: - Add tracepoints around calls to secure world Memory controller drivers: - Minor fixes for Renesas, Exynos, Mediatek and Tegra platforms - Add debug statistics to Tegra20 memory controller - Update Tegra bindings and convert to dtschema ARM SCMI Firmware: - Support for modular SCMI protocols and vendor specific extensions - New SCMI IIO driver - Per-cpu DVFS The other driver changes are all from the platform maintainers directly and reflect the drivers that don't fit into any other subsystem as well as treewide changes for a particular platform. SoCFPGA: - Various cleanups contributed by Krzysztof Kozlowski Mediatek: - add MT8183 support to mutex driver - MMSYS: use per SoC array to describe the possible routing - add MMSYS support for MT8183 and MT8167 - add support for PMIC wrapper with integrated arbiter - add support for MT8192/MT6873 Tegra: - Bug fixes to PMC and clock drivers NXP/i.MX: - Update SCU power domain driver to keep console domain power on. - Add missing ADC1 power domain to SCU power domain driver. - Update comments for single global power domain in SCU power domain driver. - Add i.MX51/i.MX53 unique id support to i.MX SoC driver. NXP/FSL SoC driver updates for v5.13 - Add ACPI support for RCPM driver - Use generic io{read,write} for QE drivers after performance optimized for PowerPC - Fix QBMAN probe to cleanup HW states correctly for kexec - Various cleanup and style fix for QBMAN/QE/GUTS drivers OMAP: - Preparation to use devicetree for genpd - ti-sysc needs iorange check improved when the interconnect target module has no control registers listed - ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid issues with missing resources and unnecessary deferred probe - ti-sysc debug option can now detect more devices - ti-sysc now warns if an old incomplete devicetree data is found as we now rely on it being complete for am3 and 4 - soc init code needs to check for prcm and prm nodes for omap4/5 and dra7 - omap-prm driver needs to enable autoidle retention support for omap4 - omap5 clocks are missing gpmc and ocmc clock registers - pci-dra7xx now needs to use builtin_platform_driver instead of using builtin_platform_driver_probe for deferred probe to work Raspberry Pi: - Fix-up all RPi firmware drivers so as for unbind to happen in an orderly fashion - Support for RPi's PoE hat PWM bus Qualcomm - Improved detection for SCM calling conventions - Support for OEM specific wifi firmware path - Added drivers for SC7280/SM8350: RPMH, LLCC< AOSS QMP" * tag 'arm-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (165 commits) soc: aspeed: fix a ternary sign expansion bug memory: mtk-smi: Add device-link between smi-larb and smi-common memory: samsung: exynos5422-dmc: handle clk_set_parent() failure memory: renesas-rpc-if: fix possible NULL pointer dereference of resource clk: socfpga: fix iomem pointer cast on 64-bit soc: aspeed: Adapt to new LPC device tree layout pinctrl: aspeed-g5: Adapt to new LPC device tree layout ipmi: kcs: aspeed: Adapt to new LPC DTS layout ARM: dts: Remove LPC BMC and Host partitions dt-bindings: aspeed-lpc: Remove LPC partitioning soc: fsl: enable acpi support in RCPM driver soc: qcom: mdt_loader: Detect truncated read of segments soc: qcom: mdt_loader: Validate that p_filesz < p_memsz soc: qcom: pdr: Fix error return code in pdr_register_listener firmware: qcom_scm: Fix kernel-doc function names to match firmware: qcom_scm: Suppress sysfs bind attributes firmware: qcom_scm: Workaround lack of "is available" call on SC7180 firmware: qcom_scm: Reduce locking section for __get_convention() firmware: qcom_scm: Make __qcom_scm_is_call_available() return bool Revert "soc: fsl: qe: introduce qe_io{read,write}* wrappers" ...
612 lines
16 KiB
C
612 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Legacy platform_data quirks
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*
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* Copyright (C) 2013 Texas Instruments
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*/
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#include <linux/clk.h>
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#include <linux/davinci_emac.h>
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/of_platform.h>
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#include <linux/wl12xx.h>
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#include <linux/mmc/card.h>
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#include <linux/mmc/host.h>
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#include <linux/power/smartreflex.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/fixed.h>
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#include <linux/platform_data/pinctrl-single.h>
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#include <linux/platform_data/hsmmc-omap.h>
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#include <linux/platform_data/iommu-omap.h>
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#include <linux/platform_data/ti-sysc.h>
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#include <linux/platform_data/wkup_m3.h>
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#include <linux/platform_data/asoc-ti-mcbsp.h>
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#include <linux/platform_data/ti-prm.h>
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#include "clockdomain.h"
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#include "common.h"
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#include "common-board-devices.h"
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#include "control.h"
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#include "omap_device.h"
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#include "omap-secure.h"
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#include "soc.h"
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static struct omap_hsmmc_platform_data __maybe_unused mmc_pdata[2];
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struct pdata_init {
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const char *compatible;
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void (*fn)(void);
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};
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static struct of_dev_auxdata omap_auxdata_lookup[];
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static struct twl4030_gpio_platform_data twl_gpio_auxdata;
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#if IS_ENABLED(CONFIG_OMAP_IOMMU)
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int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
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u8 *pwrst);
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#else
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static inline int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev,
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bool request, u8 *pwrst)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_MACH_NOKIA_N8X0
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static void __init omap2420_n8x0_legacy_init(void)
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{
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omap_auxdata_lookup[0].platform_data = n8x0_legacy_init();
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}
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#else
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#define omap2420_n8x0_legacy_init NULL
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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/*
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* Configures GPIOs 126, 127 and 129 to 1.8V mode instead of 3.0V
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* mode for MMC1 in case bootloader did not configure things.
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* Note that if the pins are used for MMC1, pbias-regulator
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* manages the IO voltage.
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*/
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static void __init omap3_gpio126_127_129(void)
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{
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u32 reg;
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reg = omap_ctrl_readl(OMAP343X_CONTROL_PBIAS_LITE);
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reg &= ~OMAP343X_PBIASLITEVMODE1;
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reg |= OMAP343X_PBIASLITEPWRDNZ1;
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omap_ctrl_writel(reg, OMAP343X_CONTROL_PBIAS_LITE);
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if (cpu_is_omap3630()) {
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reg = omap_ctrl_readl(OMAP34XX_CONTROL_WKUP_CTRL);
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reg |= OMAP36XX_GPIO_IO_PWRDNZ;
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omap_ctrl_writel(reg, OMAP34XX_CONTROL_WKUP_CTRL);
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}
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}
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static void __init hsmmc2_internal_input_clk(void)
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{
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u32 reg;
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reg = omap_ctrl_readl(OMAP343X_CONTROL_DEVCONF1);
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reg |= OMAP2_MMCSDIO2ADPCLKISEL;
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omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1);
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}
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#ifdef CONFIG_OMAP_HWMOD
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static struct iommu_platform_data omap3_iommu_pdata = {
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.reset_name = "mmu",
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.assert_reset = omap_device_assert_hardreset,
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.deassert_reset = omap_device_deassert_hardreset,
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.device_enable = omap_device_enable,
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.device_idle = omap_device_idle,
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};
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static struct iommu_platform_data omap3_iommu_isp_pdata = {
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.device_enable = omap_device_enable,
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.device_idle = omap_device_idle,
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};
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#endif
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static int omap3_sbc_t3730_twl_callback(struct device *dev,
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unsigned gpio,
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unsigned ngpio)
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{
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int res;
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res = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH,
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"wlan pwr");
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if (res)
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return res;
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gpio_export(gpio, 0);
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return 0;
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}
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static void __init omap3_sbc_t3x_usb_hub_init(int gpio, char *hub_name)
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{
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int err = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW, hub_name);
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if (err) {
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pr_err("SBC-T3x: %s reset gpio request failed: %d\n",
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hub_name, err);
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return;
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}
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gpio_export(gpio, 0);
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udelay(10);
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gpio_set_value(gpio, 1);
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msleep(1);
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}
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static void __init omap3_sbc_t3730_twl_init(void)
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{
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twl_gpio_auxdata.setup = omap3_sbc_t3730_twl_callback;
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}
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static void __init omap3_sbc_t3730_legacy_init(void)
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{
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omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
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}
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static void __init omap3_sbc_t3530_legacy_init(void)
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{
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omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
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}
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static void __init omap3_evm_legacy_init(void)
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{
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hsmmc2_internal_input_clk();
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}
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static void am35xx_enable_emac_int(void)
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{
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u32 v;
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v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
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v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR |
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AM35XX_CPGMAC_C0_MISC_PULSE_CLR | AM35XX_CPGMAC_C0_RX_THRESH_CLR);
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omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
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omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
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}
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static void am35xx_disable_emac_int(void)
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{
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u32 v;
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v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
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v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR);
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omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
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omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
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}
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static struct emac_platform_data am35xx_emac_pdata = {
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.interrupt_enable = am35xx_enable_emac_int,
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.interrupt_disable = am35xx_disable_emac_int,
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};
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static void __init am35xx_emac_reset(void)
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{
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u32 v;
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v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
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v &= ~AM35XX_CPGMACSS_SW_RST;
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omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
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omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
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}
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static struct gpio cm_t3517_wlan_gpios[] __initdata = {
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{ 56, GPIOF_OUT_INIT_HIGH, "wlan pwr" },
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{ 4, GPIOF_OUT_INIT_HIGH, "xcvr noe" },
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};
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static void __init omap3_sbc_t3517_wifi_init(void)
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{
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int err = gpio_request_array(cm_t3517_wlan_gpios,
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ARRAY_SIZE(cm_t3517_wlan_gpios));
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if (err) {
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pr_err("SBC-T3517: wl12xx gpios request failed: %d\n", err);
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return;
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}
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gpio_export(cm_t3517_wlan_gpios[0].gpio, 0);
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gpio_export(cm_t3517_wlan_gpios[1].gpio, 0);
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msleep(100);
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gpio_set_value(cm_t3517_wlan_gpios[1].gpio, 0);
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}
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static void __init omap3_sbc_t3517_legacy_init(void)
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{
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omap3_sbc_t3x_usb_hub_init(152, "cm-t3517 usb hub");
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omap3_sbc_t3x_usb_hub_init(98, "sb-t35 usb hub");
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am35xx_emac_reset();
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hsmmc2_internal_input_clk();
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omap3_sbc_t3517_wifi_init();
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}
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static void __init am3517_evm_legacy_init(void)
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{
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am35xx_emac_reset();
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}
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static void __init nokia_n900_legacy_init(void)
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{
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hsmmc2_internal_input_clk();
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mmc_pdata[0].name = "external";
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mmc_pdata[1].name = "internal";
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if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
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if (IS_ENABLED(CONFIG_ARM_ERRATA_430973)) {
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pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
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/* set IBE to 1 */
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rx51_secure_update_aux_cr(BIT(6), 0);
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} else {
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pr_warn("RX-51: Not enabling ARM errata 430973 workaround\n");
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pr_warn("Thumb binaries may crash randomly without this workaround\n");
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}
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}
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}
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static void __init omap3_tao3530_legacy_init(void)
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{
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hsmmc2_internal_input_clk();
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}
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static void __init omap3_logicpd_torpedo_init(void)
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{
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omap3_gpio126_127_129();
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}
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/* omap3pandora legacy devices */
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static struct platform_device pandora_backlight = {
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.name = "pandora-backlight",
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.id = -1,
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};
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static void __init omap3_pandora_legacy_init(void)
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{
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platform_device_register(&pandora_backlight);
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}
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#endif /* CONFIG_ARCH_OMAP3 */
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#ifdef CONFIG_SOC_OMAP5
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static void __init omap5_uevm_legacy_init(void)
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{
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}
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#endif
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#ifdef CONFIG_SOC_DRA7XX
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static struct iommu_platform_data dra7_ipu1_dsp_iommu_pdata = {
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.set_pwrdm_constraint = omap_iommu_set_pwrdm_constraint,
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};
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static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc1;
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static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc2;
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static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc3;
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static void __init dra7x_evm_mmc_quirk(void)
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{
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if (omap_rev() == DRA752_REV_ES1_1 || omap_rev() == DRA752_REV_ES1_0) {
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dra7_hsmmc_data_mmc1.version = "rev11";
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dra7_hsmmc_data_mmc1.max_freq = 96000000;
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dra7_hsmmc_data_mmc2.version = "rev11";
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dra7_hsmmc_data_mmc2.max_freq = 48000000;
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dra7_hsmmc_data_mmc3.version = "rev11";
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dra7_hsmmc_data_mmc3.max_freq = 48000000;
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}
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}
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#endif
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static struct clockdomain *ti_sysc_find_one_clockdomain(struct clk *clk)
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{
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struct clk_hw *hw = __clk_get_hw(clk);
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struct clockdomain *clkdm = NULL;
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struct clk_hw_omap *hwclk;
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hwclk = to_clk_hw_omap(hw);
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if (!omap2_clk_is_hw_omap(hw))
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return NULL;
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if (hwclk && hwclk->clkdm_name)
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clkdm = clkdm_lookup(hwclk->clkdm_name);
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return clkdm;
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}
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/**
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* ti_sysc_clkdm_init - find clockdomain based on clock
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* @fck: device functional clock
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* @ick: device interface clock
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* @dev: struct device
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*
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* Populate clockdomain based on clock. It is needed for
|
|
* clkdm_deny_idle() and clkdm_allow_idle() for blocking clockdomain
|
|
* clockdomain idle during reset, enable and idle.
|
|
*
|
|
* Note that we assume interconnect driver manages the clocks
|
|
* and do not need to populate oh->_clk for dynamically
|
|
* allocated modules.
|
|
*/
|
|
static int ti_sysc_clkdm_init(struct device *dev,
|
|
struct clk *fck, struct clk *ick,
|
|
struct ti_sysc_cookie *cookie)
|
|
{
|
|
if (!IS_ERR(fck))
|
|
cookie->clkdm = ti_sysc_find_one_clockdomain(fck);
|
|
if (cookie->clkdm)
|
|
return 0;
|
|
if (!IS_ERR(ick))
|
|
cookie->clkdm = ti_sysc_find_one_clockdomain(ick);
|
|
if (cookie->clkdm)
|
|
return 0;
|
|
|
|
return -ENODEV;
|
|
}
|
|
|
|
static void ti_sysc_clkdm_deny_idle(struct device *dev,
|
|
const struct ti_sysc_cookie *cookie)
|
|
{
|
|
if (cookie->clkdm)
|
|
clkdm_deny_idle(cookie->clkdm);
|
|
}
|
|
|
|
static void ti_sysc_clkdm_allow_idle(struct device *dev,
|
|
const struct ti_sysc_cookie *cookie)
|
|
{
|
|
if (cookie->clkdm)
|
|
clkdm_allow_idle(cookie->clkdm);
|
|
}
|
|
|
|
#ifdef CONFIG_OMAP_HWMOD
|
|
static int ti_sysc_enable_module(struct device *dev,
|
|
const struct ti_sysc_cookie *cookie)
|
|
{
|
|
if (!cookie->data)
|
|
return -EINVAL;
|
|
|
|
return omap_hwmod_enable(cookie->data);
|
|
}
|
|
|
|
static int ti_sysc_idle_module(struct device *dev,
|
|
const struct ti_sysc_cookie *cookie)
|
|
{
|
|
if (!cookie->data)
|
|
return -EINVAL;
|
|
|
|
return omap_hwmod_idle(cookie->data);
|
|
}
|
|
|
|
static int ti_sysc_shutdown_module(struct device *dev,
|
|
const struct ti_sysc_cookie *cookie)
|
|
{
|
|
if (!cookie->data)
|
|
return -EINVAL;
|
|
|
|
return omap_hwmod_shutdown(cookie->data);
|
|
}
|
|
#endif /* CONFIG_OMAP_HWMOD */
|
|
|
|
static bool ti_sysc_soc_type_gp(void)
|
|
{
|
|
return omap_type() == OMAP2_DEVICE_TYPE_GP;
|
|
}
|
|
|
|
static struct of_dev_auxdata omap_auxdata_lookup[];
|
|
|
|
static struct ti_sysc_platform_data ti_sysc_pdata = {
|
|
.auxdata = omap_auxdata_lookup,
|
|
.soc_type_gp = ti_sysc_soc_type_gp,
|
|
.init_clockdomain = ti_sysc_clkdm_init,
|
|
.clkdm_deny_idle = ti_sysc_clkdm_deny_idle,
|
|
.clkdm_allow_idle = ti_sysc_clkdm_allow_idle,
|
|
#ifdef CONFIG_OMAP_HWMOD
|
|
.init_module = omap_hwmod_init_module,
|
|
.enable_module = ti_sysc_enable_module,
|
|
.idle_module = ti_sysc_idle_module,
|
|
.shutdown_module = ti_sysc_shutdown_module,
|
|
#endif
|
|
};
|
|
|
|
static struct pcs_pdata pcs_pdata;
|
|
|
|
void omap_pcs_legacy_init(int irq, void (*rearm)(void))
|
|
{
|
|
pcs_pdata.irq = irq;
|
|
pcs_pdata.rearm = rearm;
|
|
}
|
|
|
|
static struct ti_prm_platform_data ti_prm_pdata = {
|
|
.clkdm_deny_idle = clkdm_deny_idle,
|
|
.clkdm_allow_idle = clkdm_allow_idle,
|
|
.clkdm_lookup = clkdm_lookup,
|
|
};
|
|
|
|
/*
|
|
* GPIOs for TWL are initialized by the I2C bus and need custom
|
|
* handing until DSS has device tree bindings.
|
|
*/
|
|
void omap_auxdata_legacy_init(struct device *dev)
|
|
{
|
|
if (dev->platform_data)
|
|
return;
|
|
|
|
if (strcmp("twl4030-gpio", dev_name(dev)))
|
|
return;
|
|
|
|
dev->platform_data = &twl_gpio_auxdata;
|
|
}
|
|
|
|
#if defined(CONFIG_ARCH_OMAP3) && IS_ENABLED(CONFIG_SND_SOC_OMAP_MCBSP)
|
|
static struct omap_mcbsp_platform_data mcbsp_pdata;
|
|
static void __init omap3_mcbsp_init(void)
|
|
{
|
|
omap3_mcbsp_init_pdata_callback(&mcbsp_pdata);
|
|
}
|
|
#else
|
|
static void __init omap3_mcbsp_init(void) {}
|
|
#endif
|
|
|
|
/*
|
|
* Few boards still need auxdata populated before we populate
|
|
* the dev entries in of_platform_populate().
|
|
*/
|
|
static struct pdata_init auxdata_quirks[] __initdata = {
|
|
#ifdef CONFIG_SOC_OMAP2420
|
|
{ "nokia,n800", omap2420_n8x0_legacy_init, },
|
|
{ "nokia,n810", omap2420_n8x0_legacy_init, },
|
|
{ "nokia,n810-wimax", omap2420_n8x0_legacy_init, },
|
|
#endif
|
|
#ifdef CONFIG_ARCH_OMAP3
|
|
{ "compulab,omap3-sbc-t3730", omap3_sbc_t3730_twl_init, },
|
|
#endif
|
|
{ /* sentinel */ },
|
|
};
|
|
|
|
struct omap_sr_data __maybe_unused omap_sr_pdata[OMAP_SR_NR];
|
|
|
|
static struct of_dev_auxdata omap_auxdata_lookup[] = {
|
|
#ifdef CONFIG_MACH_NOKIA_N8X0
|
|
OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL),
|
|
OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data),
|
|
OF_DEV_AUXDATA("tlv320aic3x", 0x18, "2-0018", &n810_aic33_data),
|
|
#endif
|
|
#ifdef CONFIG_ARCH_OMAP3
|
|
OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu",
|
|
&omap3_iommu_pdata),
|
|
OF_DEV_AUXDATA("ti,omap2-iommu", 0x480bd400, "480bd400.mmu",
|
|
&omap3_iommu_isp_pdata),
|
|
OF_DEV_AUXDATA("ti,omap3-smartreflex-core", 0x480cb000,
|
|
"480cb000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]),
|
|
OF_DEV_AUXDATA("ti,omap3-smartreflex-mpu-iva", 0x480c9000,
|
|
"480c9000.smartreflex", &omap_sr_pdata[OMAP_SR_MPU]),
|
|
OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x4809c000, "4809c000.mmc", &mmc_pdata[0]),
|
|
OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x480b4000, "480b4000.mmc", &mmc_pdata[1]),
|
|
/* Only on am3517 */
|
|
OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL),
|
|
OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0",
|
|
&am35xx_emac_pdata),
|
|
OF_DEV_AUXDATA("nokia,n900-rom-rng", 0, NULL, rx51_secure_rng_call),
|
|
/* McBSP modules with sidetone core */
|
|
#if IS_ENABLED(CONFIG_SND_SOC_OMAP_MCBSP)
|
|
OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49022000, "49022000.mcbsp", &mcbsp_pdata),
|
|
OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49024000, "49024000.mcbsp", &mcbsp_pdata),
|
|
#endif
|
|
#endif
|
|
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
|
|
OF_DEV_AUXDATA("ti,omap4-smartreflex-iva", 0x4a0db000,
|
|
"4a0db000.smartreflex", &omap_sr_pdata[OMAP_SR_IVA]),
|
|
OF_DEV_AUXDATA("ti,omap4-smartreflex-core", 0x4a0dd000,
|
|
"4a0dd000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]),
|
|
OF_DEV_AUXDATA("ti,omap4-smartreflex-mpu", 0x4a0d9000,
|
|
"4a0d9000.smartreflex", &omap_sr_pdata[OMAP_SR_MPU]),
|
|
#endif
|
|
#ifdef CONFIG_SOC_DRA7XX
|
|
OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x4809c000, "4809c000.mmc",
|
|
&dra7_hsmmc_data_mmc1),
|
|
OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480b4000, "480b4000.mmc",
|
|
&dra7_hsmmc_data_mmc2),
|
|
OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480ad000, "480ad000.mmc",
|
|
&dra7_hsmmc_data_mmc3),
|
|
OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x40d01000, "40d01000.mmu",
|
|
&dra7_ipu1_dsp_iommu_pdata),
|
|
OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x41501000, "41501000.mmu",
|
|
&dra7_ipu1_dsp_iommu_pdata),
|
|
OF_DEV_AUXDATA("ti,dra7-iommu", 0x58882000, "58882000.mmu",
|
|
&dra7_ipu1_dsp_iommu_pdata),
|
|
#endif
|
|
/* Common auxdata */
|
|
OF_DEV_AUXDATA("simple-pm-bus", 0, NULL, omap_auxdata_lookup),
|
|
OF_DEV_AUXDATA("ti,sysc", 0, NULL, &ti_sysc_pdata),
|
|
OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata),
|
|
OF_DEV_AUXDATA("ti,omap-prm-inst", 0, NULL, &ti_prm_pdata),
|
|
OF_DEV_AUXDATA("ti,omap-sdma", 0, NULL, &dma_plat_info),
|
|
{ /* sentinel */ },
|
|
};
|
|
|
|
/*
|
|
* Few boards still need to initialize some legacy devices with
|
|
* platform data until the drivers support device tree.
|
|
*/
|
|
static struct pdata_init pdata_quirks[] __initdata = {
|
|
#ifdef CONFIG_ARCH_OMAP3
|
|
{ "compulab,omap3-sbc-t3517", omap3_sbc_t3517_legacy_init, },
|
|
{ "compulab,omap3-sbc-t3530", omap3_sbc_t3530_legacy_init, },
|
|
{ "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, },
|
|
{ "nokia,omap3-n900", nokia_n900_legacy_init, },
|
|
{ "nokia,omap3-n9", hsmmc2_internal_input_clk, },
|
|
{ "nokia,omap3-n950", hsmmc2_internal_input_clk, },
|
|
{ "logicpd,dm3730-torpedo-devkit", omap3_logicpd_torpedo_init, },
|
|
{ "ti,omap3-evm-37xx", omap3_evm_legacy_init, },
|
|
{ "ti,am3517-evm", am3517_evm_legacy_init, },
|
|
{ "technexion,omap3-tao3530", omap3_tao3530_legacy_init, },
|
|
{ "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, },
|
|
{ "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, },
|
|
#endif
|
|
#ifdef CONFIG_SOC_OMAP5
|
|
{ "ti,omap5-uevm", omap5_uevm_legacy_init, },
|
|
#endif
|
|
#ifdef CONFIG_SOC_DRA7XX
|
|
{ "ti,dra7-evm", dra7x_evm_mmc_quirk, },
|
|
#endif
|
|
{ /* sentinel */ },
|
|
};
|
|
|
|
static void pdata_quirks_check(struct pdata_init *quirks)
|
|
{
|
|
while (quirks->compatible) {
|
|
if (of_machine_is_compatible(quirks->compatible)) {
|
|
if (quirks->fn)
|
|
quirks->fn();
|
|
}
|
|
quirks++;
|
|
}
|
|
}
|
|
|
|
static const char * const pdata_quirks_init_nodes[] = {
|
|
"prcm",
|
|
"prm",
|
|
};
|
|
|
|
static void __init
|
|
pdata_quirks_init_clocks(const struct of_device_id *omap_dt_match_table)
|
|
{
|
|
struct device_node *np;
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(pdata_quirks_init_nodes); i++) {
|
|
np = of_find_node_by_name(NULL, pdata_quirks_init_nodes[i]);
|
|
if (!np)
|
|
continue;
|
|
|
|
of_platform_populate(np, omap_dt_match_table,
|
|
omap_auxdata_lookup, NULL);
|
|
}
|
|
}
|
|
|
|
void __init pdata_quirks_init(const struct of_device_id *omap_dt_match_table)
|
|
{
|
|
/*
|
|
* We still need this for omap2420 and omap3 PM to work, others are
|
|
* using drivers/misc/sram.c already.
|
|
*/
|
|
if (of_machine_is_compatible("ti,omap2420") ||
|
|
of_machine_is_compatible("ti,omap3"))
|
|
omap_sdrc_init(NULL, NULL);
|
|
|
|
if (of_machine_is_compatible("ti,omap3"))
|
|
omap3_mcbsp_init();
|
|
pdata_quirks_check(auxdata_quirks);
|
|
|
|
pdata_quirks_init_clocks(omap_dt_match_table);
|
|
|
|
of_platform_populate(NULL, omap_dt_match_table,
|
|
omap_auxdata_lookup, NULL);
|
|
pdata_quirks_check(pdata_quirks);
|
|
}
|