mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-04 01:49:36 +00:00
![Alexander A. Klimov](/assets/img/avatar_default.png)
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
52 lines
2.2 KiB
C
52 lines
2.2 KiB
C
/*
|
|
* AM33XX PRM_XXX register bits
|
|
*
|
|
* Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation version 2.
|
|
*
|
|
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
|
* kind, whether express or implied; without even the implied warranty
|
|
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H
|
|
#define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H
|
|
|
|
#include "prm.h"
|
|
|
|
#define AM33XX_GFX_MEM_ONSTATE_MASK (0x3 << 17)
|
|
#define AM33XX_GFX_MEM_RETSTATE_MASK (1 << 6)
|
|
#define AM33XX_GFX_MEM_STATEST_MASK (0x3 << 4)
|
|
#define AM33XX_GLOBAL_WARM_SW_RST_MASK (1 << 1)
|
|
#define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 << 0)
|
|
#define AM33XX_PRUSS_MEM_ONSTATE_MASK (0x3 << 5)
|
|
#define AM33XX_PRUSS_MEM_RETSTATE_MASK (1 << 7)
|
|
#define AM33XX_PRUSS_MEM_STATEST_MASK (0x3 << 23)
|
|
#define AM33XX_LASTPOWERSTATEENTERED_SHIFT 24
|
|
#define AM33XX_LASTPOWERSTATEENTERED_MASK (0x3 << 24)
|
|
#define AM33XX_LOGICRETSTATE_MASK (1 << 2)
|
|
#define AM33XX_LOGICRETSTATE_3_3_MASK (1 << 3)
|
|
#define AM33XX_LOGICSTATEST_SHIFT 2
|
|
#define AM33XX_LOGICSTATEST_MASK (1 << 2)
|
|
#define AM33XX_LOWPOWERSTATECHANGE_SHIFT 4
|
|
#define AM33XX_LOWPOWERSTATECHANGE_MASK (1 << 4)
|
|
#define AM33XX_MPU_L1_ONSTATE_MASK (0x3 << 18)
|
|
#define AM33XX_MPU_L1_RETSTATE_MASK (1 << 22)
|
|
#define AM33XX_MPU_L1_STATEST_MASK (0x3 << 6)
|
|
#define AM33XX_MPU_L2_ONSTATE_MASK (0x3 << 20)
|
|
#define AM33XX_MPU_L2_RETSTATE_MASK (1 << 23)
|
|
#define AM33XX_MPU_L2_STATEST_MASK (0x3 << 8)
|
|
#define AM33XX_MPU_RAM_ONSTATE_MASK (0x3 << 16)
|
|
#define AM33XX_MPU_RAM_RETSTATE_MASK (1 << 24)
|
|
#define AM33XX_MPU_RAM_STATEST_MASK (0x3 << 4)
|
|
#define AM33XX_PER_MEM_ONSTATE_MASK (0x3 << 25)
|
|
#define AM33XX_PER_MEM_RETSTATE_MASK (1 << 29)
|
|
#define AM33XX_PER_MEM_STATEST_MASK (0x3 << 17)
|
|
#define AM33XX_RAM_MEM_ONSTATE_MASK (0x3 << 30)
|
|
#define AM33XX_RAM_MEM_RETSTATE_MASK (1 << 27)
|
|
#define AM33XX_RAM_MEM_STATEST_MASK (0x3 << 21)
|
|
#endif
|