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Loops-per-jiffies is a special number which represents a number of noop-loop cycles per CPU-scheduler quantum - jiffies. As you understand aside from CPU-specific implementation it depends on the CPU frequency. So when a platform has the CPU frequency fixed, we have no problem and the current udelay interface will work just fine. But as soon as CPU-freq driver is enabled and the cores frequency changes, we'll end up with distorted udelay's. In order to fix this we have to accordinly adjust the per-CPU udelay_val (the same as the global loops_per_jiffy) number. This can be done in the CPU-freq transition event handler. We subscribe to that event in the MIPS arch time-inititalization method. Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
172 lines
4.1 KiB
C
172 lines
4.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2001 MontaVista Software Inc.
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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* Copyright (c) 2003, 2004 Maciej W. Rozycki
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*
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* Common time service routines for MIPS machines.
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*/
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#include <linux/bug.h>
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#include <linux/clockchips.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/param.h>
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#include <linux/time.h>
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#include <linux/timex.h>
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/export.h>
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#include <linux/cpufreq.h>
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#include <linux/delay.h>
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#include <asm/cpu-features.h>
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#include <asm/cpu-type.h>
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#include <asm/div64.h>
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#include <asm/time.h>
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#ifdef CONFIG_CPU_FREQ
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static DEFINE_PER_CPU(unsigned long, pcp_lpj_ref);
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static DEFINE_PER_CPU(unsigned long, pcp_lpj_ref_freq);
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static unsigned long glb_lpj_ref;
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static unsigned long glb_lpj_ref_freq;
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static int cpufreq_callback(struct notifier_block *nb,
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unsigned long val, void *data)
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{
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struct cpufreq_freqs *freq = data;
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struct cpumask *cpus = freq->policy->cpus;
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unsigned long lpj;
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int cpu;
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/*
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* Skip lpj numbers adjustment if the CPU-freq transition is safe for
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* the loops delay. (Is this possible?)
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*/
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if (freq->flags & CPUFREQ_CONST_LOOPS)
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return NOTIFY_OK;
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/* Save the initial values of the lpjes for future scaling. */
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if (!glb_lpj_ref) {
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glb_lpj_ref = boot_cpu_data.udelay_val;
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glb_lpj_ref_freq = freq->old;
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for_each_online_cpu(cpu) {
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per_cpu(pcp_lpj_ref, cpu) =
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cpu_data[cpu].udelay_val;
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per_cpu(pcp_lpj_ref_freq, cpu) = freq->old;
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}
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}
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/*
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* Adjust global lpj variable and per-CPU udelay_val number in
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* accordance with the new CPU frequency.
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*/
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if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
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(val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
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loops_per_jiffy = cpufreq_scale(glb_lpj_ref,
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glb_lpj_ref_freq,
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freq->new);
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for_each_cpu(cpu, cpus) {
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lpj = cpufreq_scale(per_cpu(pcp_lpj_ref, cpu),
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per_cpu(pcp_lpj_ref_freq, cpu),
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freq->new);
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cpu_data[cpu].udelay_val = (unsigned int)lpj;
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}
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}
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return NOTIFY_OK;
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}
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static struct notifier_block cpufreq_notifier = {
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.notifier_call = cpufreq_callback,
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};
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static int __init register_cpufreq_notifier(void)
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{
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return cpufreq_register_notifier(&cpufreq_notifier,
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CPUFREQ_TRANSITION_NOTIFIER);
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}
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core_initcall(register_cpufreq_notifier);
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#endif /* CONFIG_CPU_FREQ */
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/*
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* forward reference
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*/
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL(rtc_lock);
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static int null_perf_irq(void)
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{
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return 0;
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}
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int (*perf_irq)(void) = null_perf_irq;
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EXPORT_SYMBOL(perf_irq);
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/*
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* time_init() - it does the following things.
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*
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* 1) plat_time_init() -
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* a) (optional) set up RTC routines,
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* b) (optional) calibrate and set the mips_hpt_frequency
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* (only needed if you intended to use cpu counter as timer interrupt
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* source)
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* 2) calculate a couple of cached variables for later usage
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*/
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unsigned int mips_hpt_frequency;
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EXPORT_SYMBOL_GPL(mips_hpt_frequency);
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static __init int cpu_has_mfc0_count_bug(void)
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{
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switch (current_cpu_type()) {
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case CPU_R4000PC:
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case CPU_R4000SC:
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case CPU_R4000MC:
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/*
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* V3.0 is documented as suffering from the mfc0 from count bug.
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* Afaik this is the last version of the R4000. Later versions
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* were marketed as R4400.
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*/
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return 1;
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case CPU_R4400PC:
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case CPU_R4400SC:
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case CPU_R4400MC:
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/*
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* The published errata for the R4400 up to 3.0 say the CPU
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* has the mfc0 from count bug.
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*/
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if ((current_cpu_data.processor_id & 0xff) <= 0x30)
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return 1;
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/*
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* we assume newer revisions are ok
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*/
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return 0;
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}
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return 0;
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}
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void __init time_init(void)
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{
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plat_time_init();
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/*
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* The use of the R4k timer as a clock event takes precedence;
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* if reading the Count register might interfere with the timer
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* interrupt, then we don't use the timer as a clock source.
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* We may still use the timer as a clock source though if the
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* timer interrupt isn't reliable; the interference doesn't
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* matter then, because we don't use the interrupt.
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*/
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if (mips_clockevent_init() != 0 || !cpu_has_mfc0_count_bug())
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init_mips_clocksource();
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}
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