* introduce Read While Write support for flashes featuring several banks
* set the 4-Byte Address Mode method based on SFDP data
* allow post_sfdp hook to return errors
* parse SCCR MC table and introduce support for multi-chip devices
SPI NOR manufacturer drivers changes:
* macronix: add support for mx25uw51245g with RWW
* spansion:
- determine current address mode at runtime as it can be changed in a
non-volatile way and differ from factory defaults or from what SFDP
advertises.
- enable JFFS2 write buffer mode for few ECC'd NOR flashes: S25FS256T,
s25hx and s28hx
- add support for s25hl02gt and s25hs02gt
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEEHUIqys8OyG1eHf7fS1VPR6WNFOkFAmQ5ZhIACgkQS1VPR6WN
FOkKRQgAoqUKIUr1m1Bic3gSqB70zsySfo//q/qoPSiXZ0i6y4kfHZXtb55Xekqq
sH5c6wPKbWX4LfSjbkmx7Y8rKmnopI8B7mLPM8cLwCrUdiCvzZlxIC5iHvKo2O5+
V2Aw2QTd3ty3lckw8cmfhfDZMakxRbHRxGMxEpkuAghwSVNZ5p4Df6VRC9nJAats
NO5bBAqx0yQFJeUSvK/0wdPmhglU4K56sp4obhIopem2Nixpp7sI+WawpOOSxhVp
xDrmMBBvoBMwD+92za37qBh2bLXPeo/gP1iQ0Agg/GB8fkVRH4dIe1AwrMs/Ozvz
1ScgmNOiR8VYH49IU25K7a0F3lowcg==
=ST4w
-----END PGP SIGNATURE-----
Merge tag 'spi-nor/for-6.4' into mtd/next
SPI NOR core changes:
* introduce Read While Write support for flashes featuring several banks
* set the 4-Byte Address Mode method based on SFDP data
* allow post_sfdp hook to return errors
* parse SCCR MC table and introduce support for multi-chip devices
SPI NOR manufacturer drivers changes:
* macronix: add support for mx25uw51245g with RWW
* spansion:
- determine current address mode at runtime as it can be changed in a
non-volatile way and differ from factory defaults or from what SFDP
advertises.
- enable JFFS2 write buffer mode for few ECC'd NOR flashes: S25FS256T,
s25hx and s28hx
- add support for s25hl02gt and s25hs02gt
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
38f1aa5566