linux-stable/arch/nios2/mm
Nicholas Piggin 21e6bff5e0 nios2: Fix update_mmu_cache preload the TLB with the new PTE
There is a bug in the TLB preload caused by the pid not being
shifted to the correct location in tlbmisc register.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
2019-03-07 06:00:48 +08:00
..
cacheflush.c nios2: update_mmu_cache preload the TLB with the new PTE 2019-03-07 05:29:35 +08:00
dma-mapping.c nios2: use generic dma_noncoherent_ops 2018-07-25 13:33:09 +02:00
extable.c nios2: migrate exception table users off module.h and onto extable.h 2017-01-26 10:58:14 -05:00
fault.c nios2: flush_tlb_page use PID based flush 2019-03-07 05:29:35 +08:00
init.c mm: remove include/linux/bootmem.h 2018-10-31 08:54:16 -07:00
ioremap.c
Makefile License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
mmu_context.c nios2: Process management 2014-12-08 12:55:53 +08:00
pgtable.c nios2: Page table management 2014-12-08 12:55:53 +08:00
tlb.c nios2: Fix update_mmu_cache preload the TLB with the new PTE 2019-03-07 06:00:48 +08:00
uaccess.c nios2: use generic strncpy_from_user() and strnlen_user() 2017-05-08 17:14:14 +08:00