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![Rob Herring](/assets/img/avatar_default.png)
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Lee Jones <lee@kernel.org> Cc: Stefan Wahren <stefan.wahren@i2se.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: Sylvain Lemieux <slemieux.tyco@gmail.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com> Cc: linux-rpi-kernel@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mediatek@lists.infradead.org Cc: linux-tegra@vger.kernel.org Acked-by: Eric Anholt <eric@anholt.net> Acked-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Alexandre Torgue <alexandre.torgue@st.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
241 lines
5.8 KiB
C
241 lines
5.8 KiB
C
/*
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* Copyright (C) 2007-2013 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2012-2013 Xilinx, Inc.
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* Copyright (C) 2007-2009 PetaLogix
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* Copyright (C) 2006 Atmark Techno, Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/irqdomain.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/of_address.h>
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#include <linux/io.h>
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#include <linux/jump_label.h>
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#include <linux/bug.h>
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#include <linux/of_irq.h>
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/* No one else should require these constants, so define them locally here. */
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#define ISR 0x00 /* Interrupt Status Register */
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#define IPR 0x04 /* Interrupt Pending Register */
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#define IER 0x08 /* Interrupt Enable Register */
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#define IAR 0x0c /* Interrupt Acknowledge Register */
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#define SIE 0x10 /* Set Interrupt Enable bits */
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#define CIE 0x14 /* Clear Interrupt Enable bits */
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#define IVR 0x18 /* Interrupt Vector Register */
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#define MER 0x1c /* Master Enable Register */
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#define MER_ME (1<<0)
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#define MER_HIE (1<<1)
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static DEFINE_STATIC_KEY_FALSE(xintc_is_be);
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struct xintc_irq_chip {
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void __iomem *base;
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struct irq_domain *root_domain;
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u32 intr_mask;
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};
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static struct xintc_irq_chip *xintc_irqc;
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static void xintc_write(int reg, u32 data)
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{
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if (static_branch_unlikely(&xintc_is_be))
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iowrite32be(data, xintc_irqc->base + reg);
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else
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iowrite32(data, xintc_irqc->base + reg);
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}
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static unsigned int xintc_read(int reg)
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{
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if (static_branch_unlikely(&xintc_is_be))
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return ioread32be(xintc_irqc->base + reg);
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else
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return ioread32(xintc_irqc->base + reg);
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}
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static void intc_enable_or_unmask(struct irq_data *d)
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{
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unsigned long mask = 1 << d->hwirq;
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pr_debug("irq-xilinx: enable_or_unmask: %ld\n", d->hwirq);
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/* ack level irqs because they can't be acked during
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* ack function since the handle_level_irq function
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* acks the irq before calling the interrupt handler
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*/
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if (irqd_is_level_type(d))
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xintc_write(IAR, mask);
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xintc_write(SIE, mask);
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}
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static void intc_disable_or_mask(struct irq_data *d)
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{
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pr_debug("irq-xilinx: disable: %ld\n", d->hwirq);
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xintc_write(CIE, 1 << d->hwirq);
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}
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static void intc_ack(struct irq_data *d)
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{
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pr_debug("irq-xilinx: ack: %ld\n", d->hwirq);
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xintc_write(IAR, 1 << d->hwirq);
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}
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static void intc_mask_ack(struct irq_data *d)
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{
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unsigned long mask = 1 << d->hwirq;
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pr_debug("irq-xilinx: disable_and_ack: %ld\n", d->hwirq);
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xintc_write(CIE, mask);
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xintc_write(IAR, mask);
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}
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static struct irq_chip intc_dev = {
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.name = "Xilinx INTC",
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.irq_unmask = intc_enable_or_unmask,
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.irq_mask = intc_disable_or_mask,
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.irq_ack = intc_ack,
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.irq_mask_ack = intc_mask_ack,
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};
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unsigned int xintc_get_irq(void)
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{
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unsigned int hwirq, irq = -1;
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hwirq = xintc_read(IVR);
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if (hwirq != -1U)
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irq = irq_find_mapping(xintc_irqc->root_domain, hwirq);
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pr_debug("irq-xilinx: hwirq=%d, irq=%d\n", hwirq, irq);
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return irq;
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}
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static int xintc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
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{
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if (xintc_irqc->intr_mask & (1 << hw)) {
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irq_set_chip_and_handler_name(irq, &intc_dev,
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handle_edge_irq, "edge");
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irq_clear_status_flags(irq, IRQ_LEVEL);
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} else {
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irq_set_chip_and_handler_name(irq, &intc_dev,
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handle_level_irq, "level");
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irq_set_status_flags(irq, IRQ_LEVEL);
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}
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return 0;
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}
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static const struct irq_domain_ops xintc_irq_domain_ops = {
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.xlate = irq_domain_xlate_onetwocell,
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.map = xintc_map,
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};
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static void xil_intc_irq_handler(struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_desc_get_chip(desc);
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u32 pending;
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chained_irq_enter(chip, desc);
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do {
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pending = xintc_get_irq();
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if (pending == -1U)
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break;
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generic_handle_irq(pending);
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} while (true);
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chained_irq_exit(chip, desc);
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}
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static int __init xilinx_intc_of_init(struct device_node *intc,
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struct device_node *parent)
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{
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u32 nr_irq;
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int ret, irq;
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struct xintc_irq_chip *irqc;
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if (xintc_irqc) {
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pr_err("irq-xilinx: Multiple instances aren't supported\n");
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return -EINVAL;
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}
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irqc = kzalloc(sizeof(*irqc), GFP_KERNEL);
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if (!irqc)
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return -ENOMEM;
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xintc_irqc = irqc;
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irqc->base = of_iomap(intc, 0);
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BUG_ON(!irqc->base);
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ret = of_property_read_u32(intc, "xlnx,num-intr-inputs", &nr_irq);
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if (ret < 0) {
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pr_err("irq-xilinx: unable to read xlnx,num-intr-inputs\n");
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goto err_alloc;
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}
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ret = of_property_read_u32(intc, "xlnx,kind-of-intr", &irqc->intr_mask);
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if (ret < 0) {
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pr_warn("irq-xilinx: unable to read xlnx,kind-of-intr\n");
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irqc->intr_mask = 0;
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}
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if (irqc->intr_mask >> nr_irq)
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pr_warn("irq-xilinx: mismatch in kind-of-intr param\n");
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pr_info("irq-xilinx: %pOF: num_irq=%d, edge=0x%x\n",
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intc, nr_irq, irqc->intr_mask);
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/*
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* Disable all external interrupts until they are
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* explicity requested.
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*/
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xintc_write(IER, 0);
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/* Acknowledge any pending interrupts just in case. */
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xintc_write(IAR, 0xffffffff);
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/* Turn on the Master Enable. */
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xintc_write(MER, MER_HIE | MER_ME);
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if (!(xintc_read(MER) & (MER_HIE | MER_ME))) {
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static_branch_enable(&xintc_is_be);
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xintc_write(MER, MER_HIE | MER_ME);
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}
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irqc->root_domain = irq_domain_add_linear(intc, nr_irq,
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&xintc_irq_domain_ops, irqc);
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if (!irqc->root_domain) {
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pr_err("irq-xilinx: Unable to create IRQ domain\n");
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goto err_alloc;
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}
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if (parent) {
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irq = irq_of_parse_and_map(intc, 0);
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if (irq) {
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irq_set_chained_handler_and_data(irq,
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xil_intc_irq_handler,
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irqc);
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} else {
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pr_err("irq-xilinx: interrupts property not in DT\n");
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ret = -EINVAL;
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goto err_alloc;
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}
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} else {
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irq_set_default_host(irqc->root_domain);
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}
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return 0;
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err_alloc:
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xintc_irqc = NULL;
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kfree(irqc);
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return ret;
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}
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IRQCHIP_DECLARE(xilinx_intc_xps, "xlnx,xps-intc-1.00.a", xilinx_intc_of_init);
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IRQCHIP_DECLARE(xilinx_intc_opb, "xlnx,opb-intc-1.00.c", xilinx_intc_of_init);
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